高階助聽器晶片及系統-子計畫五：助聽器類比積體電路設計( II )

Full metadata record

DC Field	Value	Language
dc.contributor.author	吳介琮	en_US
dc.contributor.author	WU JIEH-TSORNG	en_US
dc.date.accessioned	2014-12-13T10:42:51Z	-
dc.date.available	2014-12-13T10:42:51Z	-
dc.date.issued	2011	en_US
dc.identifier.govdoc	NSC100-2220-E009-006	zh_TW
dc.identifier.uri	http://hdl.handle.net/11536/99430	-
dc.identifier.uri	https://www.grb.gov.tw/search/planDetail?id=2363007&docId=374138	en_US
dc.description.sponsorship	行政院國家科學委員會	zh_TW
dc.language.iso	zh_TW	en_US
dc.subject	低功率類比電路	zh_TW
dc.subject	混合訊號式積體電路	zh_TW
dc.subject	助聽器。	zh_TW
dc.subject	Low-Power Analog Circuits	en_US
dc.subject	Mixed-Signal Integrated Circuits	en_US
dc.subject	Hearing Aids.	en_US
dc.title	高階助聽器晶片及系統-子計畫五：助聽器類比積體電路設計( II )	zh_TW
dc.title	Analog Integrated Circuit Design for Hearing Aids	en_US
dc.type	Plan	en_US
dc.contributor.department	國立交通大學電子工程學系及電子研究所	zh_TW
Appears in Collections:	Research Plans