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公開日期標題作者
1-四月-2007Impact of channel dangling bonds on reliability characteristics of flash memory on poly-Si thin filmsLin, Yu-Hsien; Chien, Chao-Hsin; Chou, Tung-Huan; Chao, Tien-Sheng; Lei, Tan-Fu; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十月-2015Impact of Crystallization Method on Poly-Si Tunnel FETsChen, Yi-Hsuan; Ma, William Cheng-Yu; Lin, Jer-Yi; Lin, Chun-Yen; Hsu, Po-Yang; Huang, Chi-Yuan; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics
1-十月-2006The impact of deep Ni salicidation and NH3 plasma treatment on nano-SOI FinFETsYou, Hsin-Chiang; Kuo, Po-Yi; Ko, Fu-Hsiang; Chao, Tien-Sheng; Lei, Tan-Fu; 材料科學與工程學系奈米科技碩博班; 電子物理學系; 電子工程學系及電子研究所; Graduate Program of Nanotechnology , Department of Materials Science and Engineering; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
1-三月-2007Impact of high-k offset spacer in 65-nm node SOI devicesMa, Ming-Wen; Wu, Chien-Hung; Yang, Tsung-Yu; Kao, Kuo-Hsing; Wu, Woei-Cherng; Wang, Shui-Jinn; Chao, Tien-Sheng; Lei, Tan-Fu; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
2011Impact of Strain Layer on Gate Leakage and Interface-State for nMOSFETs Fabricated by Stress-Memorization TechniqueLiao, Chia-Chun; Lin, Min-Chen; Chiang, Tsung-Yu; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics
2007Impacts of a buffer layer and hi-wafers on the performance of strained-channel NMOSFETs with SiN capping layerTsai, Tzu-, I; Lee, Yao-Jen; Chen, King-Sheng; Wang, Jeff; Wan, Chia-Chen; Hsueh, Fu-Kuo; Lin, Horng-Chih; Chao, Tien-Sheng; Huang, Tiao-Yuan; 物理研究所; 電子工程學系及電子研究所; Institute of Physics; Department of Electronics Engineering and Institute of Electronics
1-十月-2008Impacts of a buffer layer and hydrogen-annealed wafers on the performance of strained-channel nMOSFETs with SiN-capping layerTsai, Tzu-I; Lin, Horng-Chih; Lee, Yao-Jen; Chen, King-Sheng; Wang, Jeff; Hsueh, Fu-Kuo; Chao, Tien-Sheng; Huang, Tiao-Yuan; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
1-二月-2008Impacts of fluorine ion implantation with low-temperature solid-phase crystallized activation on high-kappa LTPS-TFTMa, Ming-Wen; Chen, Chih-Yang; Su, Chun-Jung; Wu, Woei-Cherng; Wu, Yi-Hong; Yang, Tsung-Yu; Kao, Kuo-Hsing; Chao, Tien-Sheng; Lei, Tan-Fu; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
1-四月-2013Impacts of Multiple Strain-Gate Engineering on a Zero-Temperature-Coefficient PointChang, Tien-Shun; Lu, Tsung Yi; Chao, Tien-Sheng; 交大名義發表; National Chiao Tung University
1-十一月-2008Impacts of N-2 and NH3 Plasma Surface Treatments on High-Performance LTPS-TFT With High-kappa Gate DielectricMa, Ming-Wen; Chao, Tien-Sheng; Chiang, Tsung-Yu; Wu, Woei-Cherng; Lei, Tan-Fu; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
2007Impacts of nitric acid oxidation on low-temperature polycrystalline silicon TFTs with high-k gate dielectricYang, Tsung-Yu; Ma, Ming-Wen; Kao, Kuo-Hsing; Su, Chun-Jung; Chao, Tien-Sheng; Lei, Tan-Fu; 電子物理學系; Department of Electrophysics
1-十一月-2015Impacts of the Shell Doping Profile on the Electrical Characteristics of Junctionless FETsKumar, Malkundi Puttaveerappa Vijay; Hu, Chia-Ying; Kao, Kuo-Hsing; Lee, Yao-Jen; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics
1-二月-2012Impacts of the Underlying Insulating Layers on the MILC Growth Length and Electrical CharacteristicsLiao, Chia-Chun; Lin, Min-Chen; Liu, Shao-Xuan; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics
2015Implantation Free GAA Double Spacer Poly-Si Nanowires Channel Junctionless FETs with Sub-1V Gate Operation and Near Ideal Subthreshold SwingKuo, Po-Yi; Lin, Jer-Yi; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics
1-九月-2013Improved Rear-Side Passivation by Atomic Layer Deposition Al2O3/SiNx Stack Layers for High V-OC Industrial p-Type Silicon Solar CellsLin, Je-Wei; Chen, Yi-Yang; Gan, Jon-Yiew; Hseih, Wei-Ping; Du, Chen-Hsu; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics
1-三月-2014Improvement in pH Sensitivity of Low-Temperature Polycrystalline-Silicon Thin-Film Transistor Sensors Using H-2 SinteringYen, Li-Chen; Tang, Ming-Tsyr; Chang, Fang-Yu; Pan, Tung-Ming; Chao, Tien-Sheng; Lee, Chiang-Hsuan; 電子物理學系; Department of Electrophysics
1-三月-2008Improvement on performance and reliability of TaN/HfO2 LTPS-TFTs with fluorine implantationMa, Ming-Wen; Chen, Chih-Yang; Su, Chun-Jung; Wu, Woei-Cherng; Yang, Tsung-Yu; Kao, Kuo-Hsing; Chao, Tien-Sheng; Lei, Tan-Fu; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
1-九月-2006Improving electrical characteristics of high-k NiTiO dielectric with nitrogen ion implantation.Yang, Wen-Luh; Chao, Tien-Sheng; Chen, Shine-China; Yang, Chin-Hao; Peng, Wu-Chin; 電子物理學系; Department of Electrophysics
1-九月-2017Improving the Electrical Performance of a Quantum Well FET With a Shell Doping Profile by Heterojunction OptimizationKumar, Malkundi Puttaveerappa Vijay; Hu, Chia-Ying; Walke, Amey Mahadev; Kao, Kuo-Hsing; Chao, Tien-Sheng; 物理研究所; Institute of Physics
2010Influence of Postdeposition Annealing on Physical and Electrical Properties of High-k Yb2TiO5 Gate DielectricsPan, Tung-Ming; Yen, Li-Chen; Chiang, Chien-Hung; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics