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公開日期標題作者
2008Impact of Charge Trapping Effect on Negative Bias Temperature Instability in P-MOSFETs with HfO(2)/SiON Gate StackChen, Shih-Chang; Chien, Chao-Hsin; Lou, Jen-Chung; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-九月-2007Improvements of ozone surface treatment on the electrical characteristics and reliability in HfO2 gate stacksChen, Shih-Chang; Chen, Yung-Yu; Chang, Yu-Tzu; Lou, Jen-Chung; Kin, Kon-Tsu; Chien, Chao-Hsin; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
16-十月-2006Spatial and energetic distribution of border traps in the dual-layer HfO2/SiO2 high-k gate stack by low-frequency capacitance-voltage measurementWu, Wei-Hao; Tsui, Bing-Yue; Chen, Mao-Chieh; Hou, Yong-Tian; Jin, Yin; Tao, Hun-Jan; Chen, Shih-Chang; Liang, Mong-Song; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-2007Transient charging and discharging behaviors of border traps in the dual-layer HfO2/SiO2 high-k gate stack observed by using low-frequency charge pumping methodWu, Wei-Hao; Tsui, Bing-Yue; Chen, Mao-Chieh; Hou, Yong-Tian; Jin, Yin; Tao, Hun-Jan; Chen, Shih-Chang; Liang, Mong-Song; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2008高介電係數閘極介電層在金氧半電晶體中之電特性及其可靠度研究陳世璋; Chen, Shih-Chang; 羅正忠; 簡昭欣; Jen-Chung Lou; Chao-Hsin Chien; 電子研究所
顯示 1 到 5 筆資料，總共 5 筆