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顯示 1 到 13 筆資料，總共 13 筆
公開日期標題作者
2007A 2-bit/cell, maskless, self-aligned resistance memory with high thermal stabilityHe, ChiaHua; Lee, Ming-Daou; Pan, Chen-Ling; Lai, Erb-Kun; Yao, Yeong-Der; Hsieh, Kuang-Yeu; Liu, Rich; Lu, Chih-Yuan; 材料科學與工程學系; Department of Materials Science and Engineering
2016Excellent Resistance Variability Control of WOx ReRAM by a Smart Writing AlgorithmLin, Yu-Hsuan; Wu, Jau-Yi; Lee, Ming-Hsiu; Wang, Tien-Yen; Lin, Yu-Yu; Lee, Feng-Ming; Lee, Dai-Ying; Lai, Erh-Kun; Chiang, Kuang-Hao; Lung, Hsiang-Lan; Hsieh, Kuang-Yeu; Tseng, Tseung-Yuen; Lu, Chih-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2008Highly reliable MA BE-SONOS (Metal-Al2O3 bandgap engineered SONOS) using a SiO2 buffer layerLai, Sheng-Chih; Lue, Hang-Ting; Liao, Chien-Wei; Wu, Tai-Bor; Yang, Ming-Jui; Lue, Yi-Hsien; Hsieh, Jung-Yu; Wang, Szu-Yu; Luo, Guang-Li; Chien, Chao-Hsin; Hsieh, Kuang-Yeu; Liu, Rich; Lu, Chih-Yuan; 物理研究所; 奈米中心; Institute of Physics; Nano Facility Center
1-六月-2015Impact of V-pass Interference on Charge-Trapping NAND Flash Memory DevicesHsiao, Yi-Hsuan; Lue, Hang-Ting; Chen, Wei-Chen; Chang, Kuo-Pin; Tsui, Bing-Yue; Hsieh, Kuang-Yeu; Lu, Chih-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-2014Modeling the Impact of Random Grain Boundary Traps on the Electrical Behavior of Vertical Gate 3-D NAND Flash Memory DevicesHsiao, Yi-Hsuan; Lue, Hang-Ting; Chen, Wei-Chen; Chang, Kuo-Pin; Shih, Yen-Hao; Tsui, Bing-Yue; Hsieh, Kuang-Yeu; Lu, Chih-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-四月-2009Pulse-IV Characterization of Charge-Transient Behavior of SONOS-Type Devices With or Without a Thin Tunnel OxideDu, Pei-Ying; Lue, Hang-Ting; Wang, Szu-Yu; Huang, Tiaci-Yuan; Hsieh, Kuang-Yeu; Liu, Rich; Lu, Chih-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009Reliability Study of MANOS with and without a SiO2 Buffer Layer and BE-MANOS Charge-Trapping NAND Flash DevicesLiao, Chien-Wei; Lai, Sheng-Chih; Lue, Hang-Ting; Yang, Ming-Jui; Shen, Chin-Yen; Lue, Yi-Hsien; Huang, Yu-Fong; Hsieh, Jung-Yu; Wang, Szu-Yu; Luo, Guang-Li; Chien, Chao-Hsin; Hsieh, Kuang-Yeu; Liu, Rich; Lu, Chih-Yuan; 電機學院; College of Electrical and Computer Engineering
2015A Study of Blocking and Tunnel Oxide Engineering on Double-Trapping (DT) BE-SONOS PerformanceLo, Roger; Du, Pei-Ying; Hsu, Tzu-Hsuan; Wu, Chen-Jun; Guo, Jung-Yi; Cheng, Chun-Min; Lue, Hang-Ting; Shih, Yen-Hao; Hou, Tuo-Hung; Hsieh, Kuang-Yeu; Lu, Chih-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009STUDY OF GATE-INJECTION OPERATED SONOS-TYPE DEVICES USING THE GATE-SENSING AND CHANNEL-SENSING (GSCS) METHODDu, Pei-Ying; Lue, Hang-Ting; Wang, Szu-Yu; Huang, Tiao-Yuan; Hsieh, Kuang-Yeu; Liu, Rich; Lu, Chih-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-八月-2008A study of gate-sensing and channel-sensing (GSCS) transient analysis method - Part II: Study of the intra-nitride behaviors and reliability of SONOS-type devicesDu, Pei-Ying; Lue, Hang-Ting; Wang, Szu-Yu; Huang, Tiao-Yuan; Hsieh, Kuang-Yeu; Liu, Rich; Lu, Chih-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-九月-2007Study of the gate-sensing and channel-sensing transient analysis method for monitoring the charge vertical location of SONOS-type devicesDu, Pei-Ying; Lue, Hang-Ting; Wang, Szu-Yu; Lai, Erh-Kun; Huang, Tiao-Yuan; Hsieh, Kuang-Yeu; Liu, Rich; Lu, Chih-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2010Tungsten Oxide Resistive Memory Using Rapid Thermal Oxidation of Tungsten PlugsLai, Erh-Kun; Chien, Wei-Chih; Chen, Yi-Chou; Hong, Tian-Jue; Lin, Yu-Yu; Chang, Kuo-Pin; Yao, Yeong-Der; Lin, Pang; Horng, Sheng-Fu; Gong, Jeng; Tsai, Shih-Chang; Lee, Ching-Hsiung; Hsieh, Sheng-Hui; Chen, Chun-Fu; Shih, Yen-Hao; Hsieh, Kuang-Yeu; Liu, Rich; Lu, Chih-Yuan; 材料科學與工程學系; Department of Materials Science and Engineering
1-十月-2015Ultra-High Bit Density 3D NAND Flash-Featuring-Assisted Gate OperationHsiao, Yi-Hsuan; Lue, Hang-Ting; Chen, Wei-Chen; Tsui, Bing-Yue; Hsieh, Kuang-Yeu; Lu, Chih-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
顯示 1 到 13 筆資料，總共 13 筆