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公開日期標題作者
2016a-SiGeC Thin Film Photovoltaic Enabled Self-Power Monolithic 3D IC Under Indoor IlluminationKao, Ming-Hsuan; Yang, Chih-Chao; Wu, Tsung-Ta; Hsieh, Tung-Ying; Huang, Wen-Hsieh; Wang, Hsing-Hsiang; Shen, Chang-Hong; Yeh, Wen-Kuan; Chang, Meng-Fan; Shieh, Jia-Min; 光電工程學系; Department of Photonics
2-十一月-2015Charge-trap non-volatile memories fabricated by laser-enabled low-thermal budget processesHuang, Wen-Hsien; Shieh, Jia-Min; Pan, Fu-Ming; Yang, Chih-Chao; Shen, Chang-Hong; Wang, Hsing-Hsiang; Hsieh, Tung-Ying; Wu, Ssu-Yu; Wu, Meng-Chyi; 材料科學與工程學系; Department of Materials Science and Engineering
二月-2017Enabling n-type polycrystalline Ge junctionless FinFET of low thermal budget by in situ doping of channel and visible pulsed laser annealingHuang, Wen-Hsien; Shieh, Jia-Min; Kao, Ming-Hsuan; Shen, Chang-Hong; Huang, Tzu-En; Wang, Hsing-Hsiang; Yang, Chih-Chao; Hsieh, Tung-Ying; Hsieh, Jin-Long; Yu, Peichen; Yeh, Wen-Kuan; 光電工程學系; Department of Photonics
1-一月-2016First Fully Functionalized Monolithic 3D(+) IoT Chip with 0.5 V Light-electricity Power Management, 6.8 GHz Wireless-communication VCO, and 4-layer Vertical ReRAMHsueh, Fu-Kuo; Shen, Chang-Hong; Shieh, Jia-Min; Li, Kai-Shin; Chen, Hsiu-Chih; Huang, Wen-Hsien; Wang, Hsing-Hsiang; Yang, Chih-Chao; Hsieh, Tung-Ying; Lin, Chang-Hsien; Chen, Bo-Yuan; Shiao, Yu-Shao; Huang, Guo-Wei; Wong, Oi-Ying; Chen, Po-Hung; Yeh, Wen-Kuan; 電子工程學系及電子研究所; 生醫電子轉譯研究中心; Department of Electronics Engineering and Institute of Electronics; Biomedical Electronics Translational Research Center
2-五月-2017High Performance and Low power Monolithic Three-Dimensional Sub-50 nm Poly Si Thin film transistor (TFTs) CircuitsWu, Tsung-Ta; Huang, Wen-Hsien; Yang, Chih-Chao; Chen, Hung-Chun; Hsieh, Tung-Ying; Lin, Wei-Sheng; Kao, Ming-Hsuan; Chen, Chiu-Hao; Yao, Jie-Yi; Jian, Yi-Ling; Hsu, Chiung-Chih; Lin, Kun-Lin; Shen, Chang-Hong; Chueh, Yu-Lun; Shieh, Jia-Min; 光電工程學系; 光電工程研究所; Department of Photonics; Institute of EO Enginerring
13-六月-2016Junction-less poly-Ge FinFET and charge-trap NVM fabricated by laser-enabled low thermal budget processesHuang, Wen-Hsien; Shieh, Jia-Min; Shen, Chang-Hong; Huang, Tzu-En; Wang, Hsing-Hsiang; Yang, Chih-Chao; Hsieh, Tung-Ying; Hsieh, Jin-Long; Yeh, Wen-Kuan; 光電工程學系; Department of Photonics
1-一月-2018Location-controlled-grain Technique for Monolithic 3D BEOL FinFET CircuitsYang, Chih-Chao; Hsieh, Tung-Ying; Huang, Po-Tsang; Chen, Kuan-Neng; Wu, Wan-Chi; Chen, Shih-Wei; Chang, Chia-He; Shen, Chang-Hong; Shieh, Jia-Min; Hu, Chenming; Wu, Meng-Chyi; Yeh, Wen-Kuan; 交大名義發表; National Chiao Tung University
2015Logic/Memory Hybrid 3D Sequentially Integrated Circuit Using Low Thermal Budget Laser ProcessYang, Chih-Chao; Hsieh, Tung-Ying; Huang, Wen-Hsien; Wu, Tsung-Ta; Wang, Hsing-Hsiang; Shen, Chang-Hong; Kao, Ming-Hsuan; Yeh, Wen-Kuan; Chang, Meng-Fan; Wu, Meng-Chyi; Shieh, Jia-Min; 光電工程學系; Department of Photonics
2013Record-high 121/62 mu A/mu m on-currents 3D stacked epi-like Si FETs with and without metal back gateYang, Chih-Chao; Chen, Szu-Hung; Shieh, Jia-Min; Huang, Wen-Hsien; Hsieh, Tung-Ying; Shen, Chang-Hong; Wu, Tsung-Ta; Wang, Hsing-Hsiang; Lee, Yao-Jen; Hou, Fu-Ju; Pan, Ci-Ling; Chang-Liao, Kuei-Shu; Hu, Chenming; Yang, Fu-Liang; 光電工程學系; Department of Photonics
10-七月-2017A sandwiched buffer layer enabling pulsed ultraviolet- and visible-laser annealings for direct fabricating poly-Si field-effect transistors on the polyimideKao, Ming-Hsuan; Huang, Wen-Hsien; Shieh, Jia-Min; Shen, Chang-Hong; Lee, Pei-Kang; Wang, Hsing-Hsiang; Yang, Chih-Chao; Hsieh, Tung-Ying; Yu, Peichen; 資訊工程學系; 光電工程學系; Department of Computer Science; Department of Photonics
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