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公開日期標題作者
200710GSamples/s, 4-bit, 1.2V, design-for-testability ADC and DAC in 0.13 mu m CMOS technologyLiang, Sheng-Chuan; Huang, Ding-Jyun; Ho, Chen-Kang; Hong, Hao-Chiao; 電控工程研究所; Institute of Electrical and Control Engineering
1-六月-2009A Built-in-Self-Test I sigma-Delta ADC PrototypeHong, Hao-Chiao; Liang, Sheng-Chuan; Song, Hong-Chin; 電控工程研究所; Institute of Electrical and Control Engineering
2008A cost effective BIST second-order Sigma-A-modulatorHong, Hao-Chiao; Liang, Sheng-Chuan; Song, Hong-Chin; 電控工程研究所; Institute of Electrical and Control Engineering
2006A cost effective output response analyzer for Sigma-Delta modulation based BIST systemsHong, Hao-Chiao; Liang, Sheng-Chuan; 電控工程研究所; Institute of Electrical and Control Engineering
1-一月-2009A Decorrelating Design-for-Digital-Testability Scheme for Sigma - Delta ModulatorsHong, Hao-Chiao; Liang, Sheng-Chuan; 電控工程研究所; Institute of Electrical and Control Engineering
1-三月-2011A Digitally Testable Sigma - Delta Modulator Using the Decorrelating Design-for-Digital-TestabilityLiang, Sheng-Chuan; Hong, Hao-Chiao; 電機工程學系; Department of Electrical and Computer Engineering
2009A Low-Cost Output Response Analyzer for the Built-in-Self-Test Sigma-Delta Modulator Based on the Controlled Sine Wave Fitting MethodHung, Shao-Feng; Hong, Hao-Chiao; Liang, Sheng-Chuan; 電控工程研究所; Institute of Electrical and Control Engineering
2008三角積分類比數位轉換器之自我測試技術梁聖泉; Liang, Sheng-Chuan; 洪浩蕎; Hong, Hao-Chiao; 電控工程研究所
1997晶圓製造廠產品組合與機器利用率模式之構建梁勝銓; Liang, Sheng-Chuan; 蘇朝墩; 楊大和; Su, Chao-Ton; Yang, Ta-Ho; 工業工程與管理學系
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