標題: 針對3D整合之電子設計自動化技術開發---子計畫三:針對三維規則型邏輯結構之架構探索及穩健合成系統開發(II)
Architecture Exploration and Robust Synthesis Framework Development for 3D Regular Logic Structure (II)
作者: 黃俊達
Huang Juinn-Dar
國立交通大學電子工程學系及電子研究所
關鍵字: 規則型邏輯結構;架構探索;產能最佳化;多時脈溝通;高階合成;設計方法論;設計自動化;Regular logic architecture;architecture exploration;throughput optimization;multicycle communication;high-level synthesis;design methodology;and design automation.
公開日期: 2010
官方說明文件#: NSC99-2220-E009-037
URI: http://hdl.handle.net/11536/100252
https://www.grb.gov.tw/search/planDetail?id=2158310&docId=347321
Appears in Collections:Research Plans


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