標題: | Time-to-digital converter and digital-controlled clock generator and all-digital clock generator |
作者: | Hsu Terng-Yin Liao Yuan-Te Su Kai-Shu |
公開日期: | 1-Apr-2014 |
摘要: | An all-digital clock generator includes a digitally-controlled clock generator and a processing unit. The digitally-controlled clock generator generates a clock signal in response to an enable signal and a digital signal. The processing unit has a frequency multiplier and a reference signal having a period, digitizes the period to generate a quantized signal, generates the digital signal according to the quantized signal and the frequency multiplier, and generates the enable signal according to the reference signal, the clock signal and the frequency multiplier. |
官方說明文件#: | H03K019/00 H03K019/096 H03K007/08 H03L007/06 |
URI: | http://hdl.handle.net/11536/104396 |
專利國: | USA |
專利號碼: | 08686756 |
Appears in Collections: | Patents |
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