標題: | Self-calibrating high-speed analog-to-digital converter |
作者: | Su Chau-Chin Lu Hung-Wen Chi Shun-Min |
公開日期: | 6-一月-2009 |
摘要: | In a precisely self-calibrating high-speed analog to digital converter the aspect ratios of tri-state inverters are adjusted to fine-tune threshold voltage as comparators. And the multiplexers composed of tri-state inverters amplify the signal from the output of comparators. Their switches of tri-state inverters may be properly controlled to select the optimal channels and reduce unnecessary power consumption. The calibration circuitry utilizes under-sampling to calculate the duty cycles of comparators, selecting the optimal comparators and channels. By the way, the invention may avoid process variation. |
官方說明文件#: | H03M001/12 H03M001/06 H03M001/10 |
URI: | http://hdl.handle.net/11536/104758 |
專利國: | USA |
專利號碼: | 07474239 |
顯示於類別: | 專利資料 |