標題: | Highly reliable multilevel and 2-bit/cell operation of wrapped select gate (WSG) SONOS memory |
作者: | Wu, Woei-Cherng Chao, Tien-Sheng Peng, Wu-Chin Yang, Wen-Luh Wang, Jer-Chyi Chen, Jian-Hao Lai, Chao-Sung Yang, Tsung-Yu Lee, Chien-Hsing Hsieh, Tsung-Min Liou, Jhyy Cheng 電子物理學系 Department of Electrophysics |
關鍵字: | multilevel operation;source-side injection;wrapped select gate (WSG) polysilicon-oxide-nitride-oxide-silicon;(SONOS) |
公開日期: | 1-三月-2007 |
摘要: | In this letter, high-performance and reliable wrapped select gate (WSG) polysilicon-oxide-nitride-oxide-silicon (SONOS) memory cells with multilevel and 2-bit/cell operation have been successfully demonstrated. The multilevel storage is easily obtained with fast program/erase speed (10 mu s/5 ms) and low programming current (3.5 mu A) for our WSG SONOS by a source-side injection. Besides the excellent reliability properties of our multilevel WSG-SONOS memory including unconsidered gate and drain disturbance, long charge retention (> 150 degrees C) and good endurance (> 10(4)) are also presented. This novel WSG-SONOS memory with a multilevel and 2-bit/cell operation can be used in future high-density and high-performance memory application. |
URI: | http://dx.doi.org/10.1109/LED.2007.891301 http://hdl.handle.net/11536/11073 |
ISSN: | 0741-3106 |
DOI: | 10.1109/LED.2007.891301 |
期刊: | IEEE ELECTRON DEVICE LETTERS |
Volume: | 28 |
Issue: | 3 |
起始頁: | 214 |
結束頁: | 216 |
顯示於類別: | 期刊論文 |