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dc.contributor.authorLiang, S. W.en_US
dc.contributor.authorChang, Y. W.en_US
dc.contributor.authorShao, T. L.en_US
dc.contributor.authorChen, Chihen_US
dc.contributor.authorTu, K. N.en_US
dc.date.accessioned2014-12-08T15:16:12Z-
dc.date.available2014-12-08T15:16:12Z-
dc.date.issued2006-07-10en_US
dc.identifier.issn0003-6951en_US
dc.identifier.urihttp://dx.doi.org/10.1063/1.2220550en_US
dc.identifier.urihttp://hdl.handle.net/11536/12032-
dc.description.abstractEffect of three-dimensional current distribution on void formation in flip-chip solder joints during electromigration was investigated using thermoelectrical coupled modeling, in which the current and temperature redistributions were coupled and simulated at different stages of void growth. Simulation results show that a thin underbump metallization of low resistance in the periphery of the solder joint can serve as a conducting path, leading to void propagation in the periphery of the low current density region. In addition, the temperature of the solder did not rise significantly until 95% of the contact opening was eclipsed by the propagating void. (c) 2006 American Institute of Physics.en_US
dc.language.isoen_USen_US
dc.titleEffect of three-dimensional current and temperature distributions on void formation and propagation in flip-chip solder joints during electromigrationen_US
dc.typeArticleen_US
dc.identifier.doi10.1063/1.2220550en_US
dc.identifier.journalAPPLIED PHYSICS LETTERSen_US
dc.citation.volume89en_US
dc.citation.issue2en_US
dc.citation.epageen_US
dc.contributor.department材料科學與工程學系zh_TW
dc.contributor.departmentDepartment of Materials Science and Engineeringen_US
dc.identifier.wosnumberWOS:000239793100057-
dc.citation.woscount31-
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