完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Su, Ming-Chiuan | en_US |
dc.contributor.author | Chen, Wei-Zen | en_US |
dc.contributor.author | Wu, Pei-Si | en_US |
dc.contributor.author | Chen, Yu-Hsiang | en_US |
dc.contributor.author | Lee, Chao-Cheng | en_US |
dc.contributor.author | Jou, Shyh-Jye | en_US |
dc.date.accessioned | 2015-07-21T08:28:41Z | - |
dc.date.available | 2015-07-21T08:28:41Z | - |
dc.date.issued | 2015-03-01 | en_US |
dc.identifier.issn | 1549-8328 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/TCSI.2014.2367573 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/124554 | - |
dc.description.abstract | A burst mode clock and data recovery (BMCDR) circuit for 10 Gbps passive optical network (10G-PON) is presented. The proposed BMCDR is reconfigurable between data gating mode and phase tracking mode to achieve instantaneously phase-locked with jitter suppression capability. Incorporating selectively gating VCO (SGVCO), the BMCDR operates at 1/5-rate and accomplishes 1:5 demultiplexing with a high energy efficiency of 1.24 pJ/bit. With a 4 MHz, 0.22UI(pp) jitter stressed input data at 10 Gbps, the recovered clock jitter at 2 GHz is 2.94 ps(rms). The prototype is fabricated using 55 nm CMOS technology. The core area is 0.03 mm(2) only. It dissipates 12.4 mW from 1 V supply. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Burst-mode clock and data recovery (BMCDR) | en_US |
dc.subject | gated-VCO (GVCO) | en_US |
dc.subject | gigabit passive optical network (GPON) | en_US |
dc.subject | phase-locked loop (PLL) | en_US |
dc.title | A 10-Gb/s, 1.24 pJ/bit, Burst-Mode Clock and Data Recovery With Jitter Suppression | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/TCSI.2014.2367573 | en_US |
dc.identifier.journal | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS | en_US |
dc.citation.volume | 62 | en_US |
dc.citation.spage | 743 | en_US |
dc.citation.epage | 751 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000350799100015 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 期刊論文 |