標題: | Leveraging Data Lifetime for Energy-Aware Last Level Non-Volatile SRAM Caches using Redundant Store Elimination |
作者: | Tsai, Hsiang-Jen Chen, Chien-Chih Yang, Keng-Hao Yang, Ting-Chin Huang, Li-Yue Chung, Ching-Hao Chang, Meng-Fan Chen, Tien-Fu 資訊工程學系 Department of Computer Science |
關鍵字: | Non-volatile SRAM;Redundant store elimination;Energy reduction;On-chip cache architecture;Memory structure;Non-volatile memory;Multi-core |
公開日期: | 1-Jan-2014 |
摘要: | NVM has commonly been used to address increasingly large last-level caches (LLCs) requirements by reducing leakage. However, frequent data-writing operations result in increased energy consumption. In this context, a promising memory technology, Non-volatile SRAM (nvSRAM), enables normal and standby operation modes which can be used to store various types of data. However, nvSRAM suffers from high dynamic energy usage due to frequent switching between operation modes. In this paper, we propose a redundant store elimination (RSE) scheme which, on average, discards 94% of needless bit-write operations. Moreover, we present a retention-aware cache management policy to reduce data updates of cache blocks, based on the correlation between data lifetime and cache types. Experimental results demonstrate that our proposal can improve energy consumption of SRAM-based and RRAM-based LLCs by 57% and 31%, respectively. |
URI: | http://dx.doi.org/10.1145/2593069.2593153 http://hdl.handle.net/11536/124921 |
ISBN: | 978-1-4503-2730-5 |
ISSN: | 0738-100X |
DOI: | 10.1145/2593069.2593153 |
期刊: | 2014 51ST ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC) |
Appears in Collections: | Conferences Paper |
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