Evaluation of Transient Voltage Collapse Write-Assist for GeOI and SOI FinFET SRAM Cells

Abstract

This paper evaluates the impacts of Transient Voltage Collapse (TVC) Write-Assist on the GeOI and SOI FinFET SRAM cells with global and local random variations. With the TVC Write-Assist, the Write-ability and variation tolerance of GeOI and SOI FinFET SRAM cells are improved. The temperature dependence of data retention time is different between the GeOI and SOI FinFET SRAM cells. The maximum TVC Write-Assist pulse width constrained by the data retention failure is smaller in the GeOI FinFET SRAMs at 25 degrees C and becomes comparable at 125 degrees C compared with the SOI FinFET SRAMs.