標題: Improved Multi-level Control of RRAM Using Pulse-Train Programming
作者: Zhao, Liang
Chen, Hong-Yu
Wu, Shih-Chieh
Jiang, Zizhen
Yu, Shimeng
Hou, Tuo-Hung
Wong, H. -S Philip
Nishi, Yoshio
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-一月-2014
摘要: Multi-level cell (MLC) capability in RRAM is attractive for reducing the cost per bit. Based on the filamentary switching mechanisms, we propose a pulse-train programming scheme to achieve reliable and uniform MLC controls without the need of any read-verification operation. By applying the novel scheme to a 3 bit/cell RRAM device, the uniformity of resistance distribution can be improved up to 80%.
URI: http://hdl.handle.net/11536/128534
ISBN: 978-1-4799-2217-8
ISSN: 
期刊: PROCEEDINGS OF TECHNICAL PROGRAM - 2014 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATION (VLSI-TSA)
顯示於類別:會議論文