Investigation on seal-ring rules for IC product reliability in 0.25-mu m CMOS technology

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DC 欄位	值	語言
dc.contributor.author	Chen, SH	en_US
dc.contributor.author	Ker, MD	en_US
dc.date.accessioned	2014-12-08T15:18:35Z	-
dc.date.available	2014-12-08T15:18:35Z	-
dc.date.issued	2005-09-01	en_US
dc.identifier.issn	0026-2714	en_US
dc.identifier.uri	http://dx.doi.org/10.1016/j.microrel.2005.07.012	en_US
dc.identifier.uri	http://hdl.handle.net/11536/13376	-
dc.description.abstract	The distance between active region and the seal-ring location has been investigated in a 0.25 mu m CMOS process. From the experimental results, this distance can be shrunk to only 5 pm without increasing leakage current and decreasing ESD robustness of the ESD protection devices after reliability tests of High-Accelerated Stress Test (HAST) and Temperature Cycling Test (TCT). (c) 2005 Elsevier Ltd. All rights reserved.	en_US
dc.language.iso	en_US	en_US
dc.title	Investigation on seal-ring rules for IC product reliability in 0.25-mu m CMOS technology	en_US
dc.type	Article; Proceedings Paper	en_US
dc.identifier.doi	10.1016/j.microrel.2005.07.012	en_US
dc.identifier.journal	MICROELECTRONICS RELIABILITY	en_US
dc.citation.volume	45	en_US
dc.citation.issue	9-11	en_US
dc.citation.spage	1311	en_US
dc.citation.epage	1316	en_US
dc.contributor.department	電機學院	zh_TW
dc.contributor.department	College of Electrical and Computer Engineering	en_US
dc.identifier.wosnumber	WOS:000232253500007	-
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