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dc.contributor.authorDe Wang, Sen_US
dc.contributor.authorChang, TYen_US
dc.contributor.authorChien, CHen_US
dc.contributor.authorLo, WHen_US
dc.contributor.authorSang, JYen_US
dc.contributor.authorLee, JWen_US
dc.contributor.authorLei, TFen_US
dc.date.accessioned2014-12-08T15:18:51Z-
dc.date.available2014-12-08T15:18:51Z-
dc.date.issued2005-07-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2005.851242en_US
dc.identifier.urihttp://hdl.handle.net/11536/13557-
dc.description.abstractA novel and process-compatible scheme for fabricating poly-Si thin-film transistors (TFTs) on an FSG buffer layer was proposed and demonstrated. Experimental results reveal that remarkably improved device performance and uniformity can be achieved with appropriate fluorine concentration. The poly-Si TFTs fabricated on FSG layers have a higher on-current, a lower leakage current, and a higher field-effect mobility compared with the conventional poly-Si TFTs. Furthermore, the incorporation of fluorine also increased the reliability of poly-Si TFTs against hot carrier stressing, which is attributed to the formation of Si-F bonds.en_US
dc.language.isoen_USen_US
dc.subjectbuffer layeren_US
dc.subjectfluorineen_US
dc.subjectfluorinated silicate oxide (FSG)en_US
dc.subjectpolycrystalline silicon thin-film transistors (poly-Si TFTs)en_US
dc.subjectreliabilityen_US
dc.titlePerformance and reliability of poly-Si TFTs on FSG buffer layeren_US
dc.typeArticleen_US
dc.identifier.doi10.1109/LED.2005.851242en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume26en_US
dc.citation.issue7en_US
dc.citation.spage467en_US
dc.citation.epage469en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000230150400014-
dc.citation.woscount2-
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