標題: TA-FTA: Transition-Aware Functional Timing Analysis with A Four-Valued Encoding
作者: Chang, Jasper C. C.
Huang, Ryan H. -M.
Lin, Louis Y. -Z.
Wen, Charles H. -P.
資訊工程學系
Department of Computer Science
關鍵字: FTA
公開日期: 2015
摘要: Timing analysis becomes profound for modern VLSI designs. Functional timing analysis (FTA) has emerged to eliminate false paths and provide better timing closure than traditional static timing analysis (STA). However, signal transitions effect, such as multiple input switching (MIS), which changes the pin-to-pin delay of a gate as well as the overall circuit delay, has not yet been considered in FTA. Therefore, a Transition-Aware FTA (TA-FTA) engine using a novel four-valued encoding for calculating true delay under the signal-transition effect is developed in this work. However, timing analysis becomes sophisticated once the signal-transition effect is concerned. Therefore, two techniques, cone separation and filtering (CSF) and quadratic dynamic search (QDS), are also proposed to speed up TA-FTA by more than two orders in time. Experimental results shows that after considering the MIS effect, in the benchmark circuits, the delay reported by our TA-FTA increases by 23% on average and by 38% for the worst case.
URI: http://dx.doi.org/10.1145/2744769.2744914
http://hdl.handle.net/11536/135696
ISBN: 978-1-4503-3520-1
ISSN: 0738-100X
DOI: 10.1145/2744769.2744914
期刊: 2015 52ND ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC)
Appears in Collections:Conferences Paper