利用原子層沉積技術之 邏輯相容二元電阻式記憶體

Abstract

隨著現今數位科技各軟硬體技術的不斷進步與更新，為了因應高速且大量的資料傳送與存儲，低功耗，高效能且擁有高容量以及高穩定度的存儲級記憶體之發展越來越受到重視。為了達到存儲級記憶體相對應的規格需求，許多新型的非揮發性記憶體元件在這幾十年不斷被提出。其中電阻式記憶體受到相當的注目，因其擁有相對其他記憶體設計更為簡單的電容結構，並同時實現優異的記憶體特性，甚至可將其延伸至邏輯電路，仿生運算等前瞻之應用。然而，為了達到電阻式記憶體在應用面上的可行性，以下兩個主要的議題必須考量。首先，傳統的阻絲型電阻式記憶體因其利用氧空缺或金屬離子堆疊形成傳導路徑之操作機制，此過程必然伴隨著氧空缺或金屬離子隨機分佈之特性，因而衍生元件多次操作或不同元件間可靠度相關之問題。再者，元件不斷微縮下，為了形成高密度記憶體陣列，電阻式記憶體之介電層則必須使用原子層氣相沉積之製程技術，以使薄膜在各處之沉積得以均勻覆蓋，降低各處元件薄膜品質或厚度之差異。因此，此篇論文的研究聚焦於元件製程之優化及設計，藉以改善並探討電阻式記憶體可靠度相關之變異。我們採用可相容目前半導體產業的介電層及金屬材料，以原子層氣相沉積之技術，製備了以氧空缺作為阻絲傳導機制的 鎳/氧化鉿/氧化鋁/氮化鈦 以及 鎳/氧化鉿/氧化鈦/氮化鉭 兩種雙介電層之電阻式記憶體元件。此兩種元件操作上都擁有均勻之阻態分佈，後者更顯現充分的記憶體切換窗口，並且急遽的高低組態變化使其適合發展相關二階位元之邏輯運算亦或是二位元之仿生元件應用。傳統以氧空缺為阻絲傳導的電阻式記憶體，隨著施加電壓的增加其阻態由低轉高時多為漸進式的變化，而我們發現藉由調控介電層材料的厚度，能夠調控元件在此阻態轉換時呈現不同的變化行為，即是隨著厚度增厚，阻態的改變可由漸進的變化轉為瞬間的切換。接著我們探討鎳離子的遷移對元件的影響。過去已有文獻指出，上電極鎳若有部分鎳離子加入介電層中參與電阻切換之機制，將會影響高阻態轉換低阻態時的變化行為。我們從元件電性上的探討中，討論了鎳的遷移帶來阻態變化上的改變，並且導致鎳/氧化鉿/氮化鈦 此單層電阻式記憶體元件的特性劣化。因此，置入一層氧化鋁將可以有效的抑制此鎳的遷移行為，修正元件的劣化。然而，此雙層元件呈現了較低的記憶體切換窗口，不適用於記憶體各相關的應用。後續的研究我們發現將下電極氮化鈦改為氮化鉭時，記憶體的高低阻態窗口將有效的擴大。在 鎳/氧化鉿/氧化鈦/氮化鉭 雙層電阻式記憶體元件中，高低阻態的切換窗口將有兩個數量級左右的擴增，此元件的各記憶體特性顯示其相當有潛力應用於未來二位元相關之邏輯運算或仿生元件之應用。最後我們探討了不同下電極的選擇將影響後續介電層成膜後內部氧含量的分佈，進而改變元件操作時的切換差異。在僅只有 鎳/氧化鉿/氮化鉭 的單層電阻式記憶體元件，有別於單層的 鎳/氧化鉿/氮化鈦 元件在高阻態切換低阻態時的劣化，此單層元件則在每次低阻態切換高阻態時的操作變異極大，原因來自於形成導通路徑的氧空缺燈絲，其斷裂位置與粗細過於隨機。因此置入一層氧化鈦薄膜將能有效的侷限燈絲變化的區域，大幅降低了操作過程的差異。此研究總結了不同介電層材料與電極的選用，以及其不同的結構設計，將顯著的影響電阻式記憶體元件在可靠度，無論是離子的遷移，阻態切換的變異，劣化等議題，並且提供相對應之趨勢及優化之方法。

The growing demand for data storage in the current digital era and requirement of low-power, high-density, fast, reliable, non-volatile and cost-effective memory technology, also known as the Storage Class Memory (SCM), has triggered the research in the field of emerging nonvolatile memories (NVM). Among them, ReRAM devices have attracted huge attention because of their simple structure and promising potential for data storage and other novel applications beyond memory such as logic-in-memory and neuromorphic computing. To fulfill the demands of these potential applications, variability and reliability are two major challenges that filamentary ReRAM devices have been facing because of stochastic nature of the filaments. Furthermore, in high-density memory arrays, adoption of atomic layer deposition (ALD) for ReRAM fabrication is necessary to leverage ultimate scalability of such devices. This thesis mainly focuses on minimizing the switching variability and enhancing the reliability in binary RRAM devices. Variability is the main concern in the filamentary RRAM devices, and it can be minimized by engineering the RRAM stack. Employing CMOS-compatible materials and ALD technique, we fabricated bipolar valance-change-mechanism (VCM) Ni/HfO2/Al2O3/TiN and Ni/HfO2/TiO2/TaN bilayer devices. These devices show uniform switching and excellent memory window with abrupt Set and Reset, which can be used to implement binary logic or can be a candidate of binary synapse. Gradual Reset switching is often reported in most VCM-type RRAMs. We observed the Reset mode could be engineered by tuning the thickness of dielectric, and a thicker dielectric shows abrupt Reset behavior. Ni migration in the Ni/HfO2/TiN device during bipolar switching interferes with the SET mechanism, thereby inducing variability in low resistance state. We discussed about our speculation on the role of parasitic Ni migration in the memory degradation. An additional Al2O3 layer is inserted to minimize the parasitic Ni migration in the stack. However, memory window is small in this bilayer device (Ni/HfO2/Al2O3/TiN), which is undesirable for memory or logic applications. Memory window could be significantly improved by replacing the TiN bottom electrode(BE) with a TaN BE. We fabricated a Ni/HfO2/TiO2/TaN binary RRAM by engineering the bilayer stack in which memory window is 100x times better than the TiN BE device. Fabricated device exhibits promising properties suitable for logic and binary synaptic applications. Different switching behaviors with the replacement of bottom electrode are attributed to the variation in oxygen profile in the stack. In the single-layer Ni/HfO2/TaN device, substantial variability in high resistance state (HRS) is observed, which is different from the TiN BE device. We attribute the variability in HRS to the random rupturing position of filament in the bulk of HfO2. Inserting the additional TiO2 layer confines the rupturing position and minimizes variability. We conclude that material selection and their order in the RRAM stack plays an important role in ion migration and switching dynamics of the filament.