標題: Design Space Exploration Considering Back-Gate Biasing Effects for 2D Negative-Capacitance Field-Effect Transistors
作者: You, Wei-Xiang
Su, Pin
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: 2D semiconductors;back-gate biasing;ferroelectric FET;Landau-Khalatnikov (L-K) equation;molybdenum disulphide (MoS2);negative-capacitance field-effect transistor (NCFET);transition-metal-dichalcogenide (TMD)
公開日期: 1-八月-2017
摘要: With the aid of an analytical and scalable model, this paper explores the design space for negative-capacitance (NC) field-effect transistors (FETs) with a 2D semiconducting transition-metal-dichalcogenide channel. In addition, the impact of back-gate biasing on the design space and the body effect of 2D-NCFETs is also investigated. Our study indicates that, to mitigate the conflict between subthreshold swing and hysteresis and to maximize the design space for the 2D-NCFET, a thin buried oxide and an adequate reverse back-gatebias can be applied to achieve the optimum design.
URI: http://dx.doi.org/10.1109/TED.2017.2714687
http://hdl.handle.net/11536/145831
ISSN: 0018-9383
DOI: 10.1109/TED.2017.2714687
期刊: IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume: 64
起始頁: 3476
結束頁: 3481
顯示於類別:期刊論文