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dc.contributor.authorTseng, Tien-Hungen_US
dc.contributor.authorWang, Shu-Shengen_US
dc.contributor.authorChen, Jian-Youen_US
dc.contributor.authorWu, Kai-Chiangen_US
dc.date.accessioned2019-04-02T06:04:50Z-
dc.date.available2019-04-02T06:04:50Z-
dc.date.issued2017-01-01en_US
dc.identifier.urihttp://hdl.handle.net/11536/150822-
dc.description.abstractDue to escalating complexity of hardware design and manufacturing, not only are integrated circuits (ICs) designed and fabricated in multiple nations, but also software tools may be supplied worldwide. It makes hardware security become more subject to various kinds of tampering in the supply chain. Hardware Trojan horses (HTHs) can be implanted to facilitate the leakage of confidential information or cause the failure of a system. Reliability Trojan is one of the main categories of HTH attacks because its behavior is progressive and is thus not trivial to be detected, or not considered malicious. In this work, we propose to insert reliability Trojan into a circuit which can finely controls the circuit lifetime as specified by attackers (or even designers), based on manipulating BTI-induced aging behavior in a statistical manner. Experimental results show that, given a specified lifetime target, the resulting lifetime can mostly be bounded within 90% similar to 110% of the target. Instead, in a typical design considering pessimistic corners, the resulting lifetime is usually far longer than the target.en_US
dc.language.isoen_USen_US
dc.subjectlifetime Trojanen_US
dc.subjectduty cycleen_US
dc.subjectaging manipulationen_US
dc.subjecttiming violationen_US
dc.titleWorkload-Aware Lifetime Trojan based on Statistical Aging Manipulationen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2017 IEEE CONFERENCE ON DEPENDABLE AND SECURE COMPUTINGen_US
dc.citation.spage159en_US
dc.citation.epage165en_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.identifier.wosnumberWOS:000450296400019en_US
dc.citation.woscount0en_US
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