標題: | 硬體惡意行為檢測技術研究 Detection of Hardware Trojan |
作者: | 陳穎平 CHEN YING-PING 國立交通大學資訊工程學系(所) |
關鍵字: | 硬體安全防護;惡意電路;硬體木馬;旁通道訊號分析;hardware trojan horse;malicious circuit;hardware security detection;side-channel analysis |
公開日期: | 2011 |
摘要: | Short wave infrared (SWIR), read-out integrated circuit (ROIC) and focal plane array
(FPA). Most of the hardware Trojan horse is a passive monitor and extend the operational life cycle until they are triggered. Trojan hidden hardware features, this means that they are hidden under the normal operation of the circuit themselves, and unlike most circuits can be controlled as observed that if after the dismantling of the chip, the detection of this devastating result in the chip must be discarded, and can not guarantee that other chips have not been hardware Trojan horse attacks. This project is expected to adopt side-channel signals (SCS) to detect the hardware Trojans, as belonging to the testing-based methods, based on the measurement next to the channel signal parameters (power consumption, delay time, etc.). When a circuit is a malicious Trojan added hardware, the hardware Trojan causes some significant changes in parameters. In first, we can measure a non-Trojan (Trojan-free) circuit next to the channel signal parameters as a benchmark. If such parameters are significantly different, we can confirm that the circuit have been maliciously into the Trojan. |
官方說明文件#: | NSC100-2623-E009-007-D |
URI: | http://hdl.handle.net/11536/99473 https://www.grb.gov.tw/search/planDetail?id=2207343&docId=352339 |
顯示於類別: | 研究計畫 |