完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chun-Yen Chang | en_US |
dc.date.accessioned | 2019-04-11T05:48:20Z | - |
dc.date.available | 2019-04-11T05:48:20Z | - |
dc.date.issued | 2017-11-02 | en_US |
dc.identifier.govdoc | H01L051/05 | en_US |
dc.identifier.govdoc | H01L051/10 | en_US |
dc.identifier.govdoc | H01L027/28 | en_US |
dc.identifier.govdoc | H01L051/00 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/151309 | - |
dc.description.abstract | A field effect transistor (FET) structure includes a substrate, an internal gate, an insulation layer, a semiconductor strip, a gate dielectric insulator, and a gate conductor. The internal gate includes a floor portion located on the substrate and a wall portion extending from the floor portion. The insulation layer is located on the floor portion of the internal gate. The semiconductor strip is located on the wall portion and a portion of the insulation layer, and the semiconductor strip includes source/drain regions and a channel region adjacent to the source/drain regions. The gate dielectric insulator is located on the channel region. The gate conductor is located on the gate dielectric insulator. | en_US |
dc.language.iso | en_US | en_US |
dc.title | FIELD EFFECT TRANSISTOR STRUCTURE | en_US |
dc.type | Patents | en_US |
dc.citation.patentcountry | USA | en_US |
dc.citation.patentnumber | 20170317302 | en_US |
顯示於類別: | 專利資料 |