標題: A new output buffer for 3.3-V PCI-X application in a 0.13-mu m 1/2.5-V
作者: Chen, SL
Ker, MD
電機學院
College of Electrical and Computer Engineering
公開日期: 2004
摘要: An output buffer with low-voltage devices to driver high-voltage signals for PCI-X applications is proposed in this paper. Because PCI-X is a 3.3-V interface, the high-voltage gate-oxide stress is a serious problem to design PCI-X l/O circuits in a 0.13-mum 1/2.5-V CMOS process. The simulation results show that the proposed output buffer can be operated at 133 MHz without causing high-voltage gate-oxide stress problem in the 3.3-V P I-X interface. Besides, a level converter with only IN and 2.5-V devices that can converter 0/1-V voltage swing to 1/3.3-V voltage swing is also proposed in this paper. The testchip to verify this new proposed output buffer is now under fabrication. The measured results will be shown in the presentation.
URI: http://hdl.handle.net/11536/18148
ISBN: 0-7803-8637-X
期刊: PROCEEDINGS OF 2004 IEEE ASIA-PACIFIC CONFERENCE ON ADVANCED SYSTEM INTEGRATED CIRCUITS
起始頁: 112
結束頁: 115
Appears in Collections:Conferences Paper