標題: Design of 2.5V/5V mixed-voltage CMOS I/O buffer with only thin oxide device and dynamic N-well bias circuit
作者: Ker, MD
Tsai, CS
電機學院
College of Electrical and Computer Engineering
公開日期: 2003
摘要: This paper presents a 2.5V/5V mixed-voltage CMOS I/O buffer that does not need a CMOS technology with a dual-oxide option and complex bias circuits. The proposed mixed-voltage I/O buffer with simpler circuit structure can overcome the problems of leakage current and gate-oxide reliability, which occurring in the conventional CMOS I/O buffer. In this work, the new proposed design has been realized in a 0.25-mum CMOS process, but it can be easily scaled toward 0.18-mum or 0.15-mum processes to serve a 1.8V/3.3V mixed-voltage I/O interface.
URI: http://hdl.handle.net/11536/18647
ISBN: 0-7803-7761-3
期刊: PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL V: BIO-MEDICAL CIRCUITS & SYSTEMS, VLSI SYSTEMS & APPLICATIONS, NEURAL NETWORKS & SYSTEMS
起始頁: 97
結束頁: 100
Appears in Collections:Conferences Paper