標題: | NITRIDATION OF THE STACKED POLY-SI GATE TO SUPPRESS THE BORON PENETRATION IN PMOS |
作者: | LIN, YH LAI, SC LEE, CL LEI, TF CHAO, TS 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 1-六月-1995 |
摘要: | Nitridation to create nitrogen-rich layers in-between the stacked layers of the poly-Si gate to suppress the boron penetration for pMOS with the gate BF (+)(2)-implantation is proposed and demonstrated, The MOS capacitors fabricated by using this nitridized stacked poly-Si gate have better thermal stability and much improved electrical characteristics. |
URI: | http://dx.doi.org/10.1109/55.790724 http://hdl.handle.net/11536/1904 |
ISSN: | 0741-3106 |
DOI: | 10.1109/55.790724 |
期刊: | IEEE ELECTRON DEVICE LETTERS |
Volume: | 16 |
Issue: | 6 |
起始頁: | 248 |
結束頁: | 249 |
顯示於類別: | 期刊論文 |