完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.author | Chung, SS | en_US |
| dc.contributor.author | Chen, SJ | en_US |
| dc.contributor.author | Yih, CM | en_US |
| dc.contributor.author | Yang, WJ | en_US |
| dc.contributor.author | Chao, TS | en_US |
| dc.date.accessioned | 2014-12-08T15:27:09Z | - |
| dc.date.available | 2014-12-08T15:27:09Z | - |
| dc.date.issued | 1999 | en_US |
| dc.identifier.isbn | 0-7803-5220-3 | en_US |
| dc.identifier.uri | http://hdl.handle.net/11536/19394 | - |
| dc.identifier.uri | http://dx.doi.org/10.1109/RELPHY.1999.761621 | en_US |
| dc.description.abstract | In this paper, an accurate criterion has been proposed for reliability evaluation of state-of-the-art deep-submicron S/D extension n-MOSFET's. A new monitor for HC reliability evaluation has been developed using total values of N-it in the effective channel length region, instead of commonly used substrate current(I-B), impact ionization rate (I-D/I-B), or peak/average N-it values. An accurate degradation model has thus been developed based on the N-it distribution and mobility scattering effect. Moreover, this approach has been successfully used to demonstrate the feasibility for gate-engineering studies. | en_US |
| dc.language.iso | en_US | en_US |
| dc.title | An accurate hot carrier reliability monitor for deep-submicron shallow S/D junction thin gate oxide n-MOSFET's | en_US |
| dc.type | Proceedings Paper | en_US |
| dc.identifier.doi | 10.1109/RELPHY.1999.761621 | en_US |
| dc.identifier.journal | 1999 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS - 37TH ANNUAL | en_US |
| dc.citation.spage | 249 | en_US |
| dc.citation.epage | 252 | en_US |
| dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
| dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
| dc.identifier.wosnumber | WOS:000079933100038 | - |
| 顯示於類別: | 會議論文 | |

