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dc.contributor.authorChiu, Yi-Weien_US
dc.contributor.authorHu, Yu-Haoen_US
dc.contributor.authorTu, Ming-Hsienen_US
dc.contributor.authorZhao, Jun-Kaien_US
dc.contributor.authorChu, Yuan-Huaen_US
dc.contributor.authorJou, Shyh-Jyeen_US
dc.contributor.authorChuang, Ching-Teen_US
dc.date.accessioned2014-12-08T15:36:49Z-
dc.date.available2014-12-08T15:36:49Z-
dc.date.issued2014-09-01en_US
dc.identifier.issn1549-8328en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TCSI.2014.2332267en_US
dc.identifier.urihttp://hdl.handle.net/11536/25204-
dc.description.abstractThis paper presents a new bit-interleaving 12T sub-threshold SRAM cell with Data-Aware Power-Cutoff (DAPC) Write-assist to improve the Write-ability to mitigate increased device variations at low supply voltage under deep sub-100 nm processes. The disturb-free feature facilitates the bit-interleaving architecture that can reduce multiple-bit errors in a single word and enhance soft error immunity by employing error checking and correction (ECC) techniques. The proposed 12T SRAM cell is demonstrated by a 4 kb SRAM macro implemented in 40 nm general purpose (40GP) CMOS technology. The test chip operates from typical V-DD to 350 mV (similar to 100 mV lower than the threshold voltage) with V-DDMIN limited by Read operation. Data can be written successfully for V-DD down to 300 mV. The measured maximum operation frequency is 11.5 MHz with total power consumption of 22 mu W at 350 mV, 25 degrees C.en_US
dc.language.isoen_USen_US
dc.subjectData-awareen_US
dc.subjectlow supply voltageen_US
dc.subjectSRAMen_US
dc.subjectsubthreshold voltageen_US
dc.subjectwrite-assisten_US
dc.title40 nm Bit-Interleaving 12T Subthreshold SRAM With Data-Aware Write-Assisten_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TCSI.2014.2332267en_US
dc.identifier.journalIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERSen_US
dc.citation.volume61en_US
dc.citation.issue9en_US
dc.citation.spage2578en_US
dc.citation.epage2585en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000341593700007-
dc.citation.woscount0-
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