標題: Substrate-triggered SCR device for on-chip ESD protection in fully silicided sub-0.25-mu m CMOS process
作者: Ker, MD
Hsu, KC
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: electrostatic discharge (ESD);ESD protection circuit;silicon controlled rectifier (SCR);substrate-triggered technique
公開日期: 1-二月-2003
摘要: The turn-on mechanism of a silicon-controlled rectifier (SCR) device is essentially a current triggering event. While a current is applied to the, base or - substrate of the SCR device, it can be quickly triggered, into its latching state. In this paper, a novel design concept to turn on the SCR device by applying the substrate-triggered technique is first proposed for effective on-chip electrostatic discharge (ESD) protection. This novel substrate-triggered SCR device has the advantages of controllable switching voltage and adjustable holding voltage and is compatible with, general CMOS processes without extra process modification such as the silicide-blocking mask and ESD implantation. Moreover, the substrate-triggered SCR, devices can be stacked in ESD protection circuits to avoid the translient-induced latch-up issue. The turn-on time of the proposed substrate-triggered SCR devices, can be reduced from 27.4 to 7.8 ns by the substrate-triggering, technique. The substrate-triggered SCR device with a small active area of only 20 mum x 20 mum can sustain the HBM ESD stress of 6.5 kV in a fully silicided 0.25-mum CMOS process.
URI: http://dx.doi.org/10.1109/TED.2003.809028
http://hdl.handle.net/11536/28113
ISSN: 0018-9383
DOI: 10.1109/TED.2003.809028
期刊: IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume: 50
Issue: 2
起始頁: 397
結束頁: 405
顯示於類別:期刊論文


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