標題: Active devices under CMOS I/O pads
作者: Chou, KY
Chen, MJ
Liu, CW
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: CMOS;copper;ESD;FSG;IMD;I/O bonding pad;low-k;propagation gate delay;ring-oscillator;second breakdown trigger point;SOC;transmission line pulse
公開日期: 1-Dec-2002
摘要: Active devices, including electrostatic discharge protection devices and ring-oscillator circuits, under CMOS I/O pads are investigated in a 130 nm full eight-level copper metal complementary metal-oxide-semiconductoir process, using fluorinated silicate glass (FSG) low-k inter-metal dielectric. The high current I-V curve measured in the second breakdown trigger point (V-t2, I-t2) of ESD protection devices under various metal level stack structures, shows that i) I-t2 depends very weakly on the number of metal levels used, as expected given specific junction power dissipation criteria; and ii) V-t2 increases with the number of metal level stacks of I/O pads because of increased dynamic impedance due to the presence of more metal levels, as clarified by a simple RC model. Moreover, no noticeable degradation in the speed of the ring-oscillator circuit, as measured for a variety of test structures subjected to bonding mechanical stress, thermal stress by temperature cycling and dc electrical stress by transmission line pulse, as well as ac electrical stress by capacitive-coupling experiments. Accordingly, active devices under CMOS I/O pads is independent of bonding pad metal level structures.
URI: http://dx.doi.org/10.1109/TED.2002.807452
http://hdl.handle.net/11536/28365
ISSN: 0018-9383
DOI: 10.1109/TED.2002.807452
期刊: IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume: 49
Issue: 12
起始頁: 2279
結束頁: 2287
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