標題: Impact of interface nature on deep sub-micron Al-plug resistance
作者: Tsui, BY
Yang, TJ
Ku, TK
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-十一月-2001
摘要: Sputter clean had been accepted as an effective surface clean process prior to metal deposition. In this work, the impact of interface nature on via resistance of Al-interconnect as via size is scaled down to 0.16 mum was studied. Al-F compound was identified as the main interfacial contaminants after standard post-etch clean process if the TiN laver of the underlying metal line were etched through during via etch. For via size larger than 0.25 mum (aspect ratio lower than 3.2), Al-F compound can be removed by sputter clean effectively. However, below 0.25 mum, sputter clean efficiency decreases such that via resistance is degraded by the existence of Al-F interfacial layer. On the other hand, sputter clean results in oxide re-deposition, which in turn degrades via resistance. It is suggested that to obtain low resistance sub-0.2 mum via, via etch must stop on TiN layer such that no Al-F layer can be formed. Otherwise, new interfacial layer clean technology with high efficiency and without side effect has to be developed. (C) 2001 Elsevier Science Ltd. All rights reserved.
URI: http://dx.doi.org/10.1016/S0026-2714(01)00090-7
http://hdl.handle.net/11536/29316
ISSN: 0026-2714
DOI: 10.1016/S0026-2714(01)00090-7
期刊: MICROELECTRONICS RELIABILITY
Volume: 41
Issue: 11
起始頁: 1889
結束頁: 1896
顯示於類別:會議論文


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