標題: Decoding of CISC instructions in superscalar processors with high issue rate
作者: Shiu, RM
Chiu, JC
Cheng, SK
Shann, JJJ
資訊工程學系
Department of Computer Science
公開日期: 1-三月-2000
摘要: The paper examines the design issues of decoders, including the primitive operation (POP) translation strategies and the decoding rules, for CISC superscalar processors to exploit a higher degree of parallel execution. Attention is focused on the x 86 instruction set because of its popularity. There are two different approaches regarding POP translation strategies: one is to merge the address generation into load/store operations, and the other is to translate the isolated address generation operations. Simulation results show that, in high issue-rate decoders, the latter strategy improves the performance by 20 to 25 %. Furthermore, considering the tradeoffs between the hardware cost and performance, a cost-effective decoding rule suitable for current commercial programs is recommended.
URI: http://dx.doi.org/10.1049/ip-cdt:20000450
http://hdl.handle.net/11536/30693
ISSN: 1350-2387
DOI: 10.1049/ip-cdt:20000450
期刊: IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES
Volume: 147
Issue: 2
起始頁: 101
結束頁: 107
顯示於類別:期刊論文


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