標題: | GENERALIZED TRACE-BACK TECHNIQUES FOR SURVIVOR MEMORY MANAGEMENT IN THE VITERBI ALGORITHM |
作者: | CYPHER, R SHUNG, CB 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | VITERBI ALGORITHM;TRACE-BACK;SURVIVOR MEMORY;VLSI AREA REQUIREMENTS |
公開日期: | 1-Jan-1993 |
摘要: | The trace-back technique is an effective approach for survivor memory management in the Viterbi algorithm. It is especially attractive when the number of states in the trellis is large, in which case the register exchange approach is impractical due to the area required for wiring. Previous descriptions of the trace-back technique have assumed either one or two trace-back pointers and have made specific assumptions about the speeds of those pointers. In this paper we present a general framework for implementing the trace-back technique with any number of traceback pointers and with relaxed assumptions about the speeds of the pointers. We also show that the use of additional trace-back pointers reduces the memory requirements. Two implementations of the generalized trace-back techniques based on standard RAMs and custom shift registers are presented. |
URI: | http://dx.doi.org/10.1007/BF01880274 http://hdl.handle.net/11536/3155 |
ISSN: | 0922-5773 |
DOI: | 10.1007/BF01880274 |
期刊: | JOURNAL OF VLSI SIGNAL PROCESSING |
Volume: | 5 |
Issue: | 1 |
起始頁: | 85 |
結束頁: | 94 |
Appears in Collections: | Articles |