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dc.contributor.authorJou, JYen_US
dc.contributor.authorNien, MCen_US
dc.date.accessioned2014-12-08T15:48:51Z-
dc.date.available2014-12-08T15:48:51Z-
dc.date.issued1998-08-01en_US
dc.identifier.issn1350-2409en_US
dc.identifier.urihttp://hdl.handle.net/11536/32480-
dc.description.abstractPower consumption and testability are two of major considerations in modern VLSI design. A full-scan method had been used widely in the past, to improve the testability of sequential circuits. Owing to the lower overheads incurred, the partial-scan design has gradually become popular. The authors propose a partial-scan selection strategy which is based on the structural analysis approach and considers the area and power overheads simultaneously. A powerful sample-and-search algorithm is used to find the solution that minimises the user-specified cost function in terms of power and area overheads. The experimental results show that the sample-and-search algorithm derived by the authors can effectively find the best solution of the specified cost function, for almost all circuits, and, on average, the saving of overheads for each specific cost function is significant.en_US
dc.language.isoen_USen_US
dc.subjectdesignen_US
dc.subjectVLSIen_US
dc.subjectalgorithmsen_US
dc.subjectpartial scan approachen_US
dc.subjectautomatic test pattern generationen_US
dc.titlePower-oriented partial-scan design approachen_US
dc.typeArticleen_US
dc.identifier.journalIEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMSen_US
dc.citation.volume145en_US
dc.citation.issue4en_US
dc.citation.spage229en_US
dc.citation.epage235en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000075552100003-
dc.citation.woscount0-
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