Title: | A HARDWARE IMPLEMENTABLE 2-LEVEL PARALLEL COMPUTING ALGORITHM FOR GENERAL MINIMUM-TIME CONTROL |
Authors: | LIN, SY 交大名義發表 電控工程研究所 National Chiao Tung University Institute of Electrical and Control Engineering |
Issue Date: | 1-May-1992 |
Abstract: | In this paper, we propose a hardware implementable two-level parallel computing algorithm for general minimum-time control. We first discretize and transform the minimum-time control problem for a continuous-time system into a parameter optimization problem which is large dimensional and nonseparable. Then, the proposed two-level algorithm decomposes this parameter optimization problem into a master-slave problem. The master problem can be easily solved by a one-dimensional gradient method, and the slave problem will be solved by the proposed parallel computing method which combines recursive quadratic programming with the dual method. Furthermore, we have proved the convergence of this iterative two-level parallel computing algorithm under some conditions. Based on the VLSI array processor technology, we present a dedicated hardware computing architecture to realize this algorithm. The corresponding time complexity is also analyzed. Finally, several practical problems including the minimum-time orbit transfer problem and the minimum-time robot control problem have been simulated. The results show that the algorithm is well-suited for real-time application of minimum-time control. |
URI: | http://dx.doi.org/10.1109/9.135492 http://hdl.handle.net/11536/3427 |
ISSN: | 0018-9286 |
DOI: | 10.1109/9.135492 |
Journal: | IEEE TRANSACTIONS ON AUTOMATIC CONTROL |
Volume: | 37 |
Issue: | 5 |
Begin Page: | 589 |
End Page: | 603 |
Appears in Collections: | Articles |
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