DELAY MODELS AND SPEED IMPROVEMENT TECHNIQUES FOR RC TREE INTERCONNECTIONS AMONG SMALL-GEOMETRY CMOS INVERTERS

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DC Field	Value	Language
dc.contributor.author	WU, CY	en_US
dc.contributor.author	SHIAU, MC	en_US
dc.date.accessioned	2014-12-08T15:05:27Z	-
dc.date.available	2014-12-08T15:05:27Z	-
dc.date.issued	1990-10-01	en_US
dc.identifier.issn	0018-9200	en_US
dc.identifier.uri	http://dx.doi.org/10.1109/4.62149	en_US
dc.identifier.uri	http://hdl.handle.net/11536/3999	-
dc.language.iso	en_US	en_US
dc.title	DELAY MODELS AND SPEED IMPROVEMENT TECHNIQUES FOR RC TREE INTERCONNECTIONS AMONG SMALL-GEOMETRY CMOS INVERTERS	en_US
dc.type	Article	en_US
dc.identifier.doi	10.1109/4.62149	en_US
dc.identifier.journal	IEEE JOURNAL OF SOLID-STATE CIRCUITS	en_US
dc.citation.volume	25	en_US
dc.citation.issue	5	en_US
dc.citation.spage	1247	en_US
dc.citation.epage	1256	en_US
dc.contributor.department	交大名義發表	zh_TW
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	National Chiao Tung University	en_US
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:A1990EA15600028	-
dc.citation.woscount	11	-
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