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dc.contributor.authorWU, CYen_US
dc.contributor.authorSHIAU, MCen_US
dc.date.accessioned2014-12-08T15:05:27Z-
dc.date.available2014-12-08T15:05:27Z-
dc.date.issued1990-10-01en_US
dc.identifier.issn0018-9200en_US
dc.identifier.urihttp://dx.doi.org/10.1109/4.62149en_US
dc.identifier.urihttp://hdl.handle.net/11536/3999-
dc.language.isoen_USen_US
dc.titleDELAY MODELS AND SPEED IMPROVEMENT TECHNIQUES FOR RC TREE INTERCONNECTIONS AMONG SMALL-GEOMETRY CMOS INVERTERSen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/4.62149en_US
dc.identifier.journalIEEE JOURNAL OF SOLID-STATE CIRCUITSen_US
dc.citation.volume25en_US
dc.citation.issue5en_US
dc.citation.spage1247en_US
dc.citation.epage1256en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:A1990EA15600028-
dc.citation.woscount11-
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