全域非同步區域同步系統之兩階段握手協定介面

Abstract

現今大部分的數位系統還是以同步電路的方式來設計。但如同我們所知，隨著電路複雜度的增加，產生的問題也愈來愈多，如時脈時滯和功率消耗的問題。此外，SoC(系統單晶片)是現今的另一種設計趨勢，要將一個SoC設計中的多個IP(知識產權)模組做整合並不是那麼的容易。所以，為了要解決上述問題，GALS(全域非同步區域同步)是一個可以被期待的設計方式。 相較於傳統四階段握手協定、可延展時脈的GALS系統而言，我們提出了適用於可延展時脈GALS系統的兩階段握手協定介面。在我們的設計中，區域的同步模組可以有各自不同的時脈，並且可以正確的運算。並將這個新設計用Synopsys Design Compiler來做合成，使用的是TSMC 0.13微米的元件資料庫。 最後得到的結果顯示，我們提出的兩階段握手協定的新設計比起四階段握手協定的設計來說，有比較短的延遲時間；但如果就面積的觀點來看，兩階段握手協定的新設計所佔的面積要比四階段握手協定的設計來得大。

Most modern digital systems are based on synchronous circuit design nowadays. But as we know, with the increasing complexity of digital circuits, there are some problems such as clock skew and power consumption. In addition, system on chip (SoC) design is another trend today. To integrate several intellectual property (IP) modules in a SoC design is not an easy job. Globally asynchronous locally synchronous (GALS) design is a promising approach to solve these problems. Compared with traditional four-phase handshaking, stretchable clocking based GALS systems, we propose a two-phase handshaking interface for stretchable clocking based GALS systems. In our design, the local synchronous modules can operate at different clock frequencies independently and work correctly. The design is synthesized with Synopsys Design Compiler with TSMC 0.13μm cell library. The result shows that the new two-phase handshaking design has better latency than four-phase handshaking counterpart. But from the viewpoint of area, the new two-phase handshaking design is larger than four-phase handshaking counterpart.