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dc.contributor.authorWU, CYen_US
dc.contributor.authorLI, Cen_US
dc.contributor.authorHWANG, JSen_US
dc.date.accessioned2014-12-08T15:05:59Z-
dc.date.available2014-12-08T15:05:59Z-
dc.date.issued1988-05-01en_US
dc.identifier.issn0143-7062en_US
dc.identifier.urihttp://hdl.handle.net/11536/4535-
dc.language.isoen_USen_US
dc.titleTIMING MACROMODELS FOR CMOS STATIC SET RESET LATCHES AND THEIR APPLICATIONSen_US
dc.typeArticleen_US
dc.identifier.journalIEE PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUESen_US
dc.citation.volume135en_US
dc.citation.issue3en_US
dc.citation.spage151en_US
dc.citation.epage160en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:A1988N421000003-
dc.citation.woscount2-
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