矽化鎳在積體電路應用上之材料性質與製程技術

Abstract

本論文研究主要在於探討矽化鎳在積體電路應用上之材料性質與製程技術。首先，我們探討矽化鎳(NiSi)薄膜的熱穩定性。其次，我們探討以離子植入矽化鎳之技術，研製特性極為優越的NiSi/p+n及NiSi/n+p淺接面二極體，並且以四端點凱爾文(Kelvin)結構量測NiSi/p+n結構之接觸電阻。最後，對於銅電極接觸的TaN/Cu/NiSi/p+n二極體結構的高溫穩定性加以探討。 對於矽化鎳(NiSi)薄膜的熱穩定性探討，吾人選定的NiSi薄膜厚度為315及615埃。NiSi薄膜的熱穩定性，和離子植入的條件與植入的離子種類有關。我們發現，經過BF2+及氟離子(F+)植入的NiSi薄膜，其熱穩定性大為提昇，而經過硼離子(B+)及磷離子(P+)植入的NiSi薄膜之熱穩定性則顯現劣化。NiSi薄膜的熱穩定性提昇可歸因於氟離子可強化NiSi薄膜的鍵結，進而降低NiSi薄膜與矽基板之間的應力。 其次，我們採用離子植入NiSi層的技術(ITS 方式)配合傳統爐管的低溫退火以及快速升溫退火(RTA)來研製NiSi/p+n和NiSi/n+p淺接面二極體。在本研究中，以傳統爐管退火製作的NiSi(310 Å)/p+n淺接面的接面深度介於23到70 nm之間 (自NiSi/Si介面算起)。就600oC 退火30分鐘所形成的NiSi/p+n接面而言，接面深度為56 nm，順向電流理想因素可達1.01，在5伏逆向偏壓下之接面漏電流密度可低於2 nA/cm2。以RTA退火製作的NiSi(310 Å)/p+n淺接面的接面深度介於23到56 nm之間。就650oC RTA (30秒)退火所形成的NiSi/p+n接面而言，接面深度為37 nm，順向電流理想因素可達1.001，在5伏逆向偏壓之接面漏電流密度可低於4 nA/cm2。另外，我們製作四端點凱爾文(Kelvin)結構，據以量測NiSi/p+n接觸的接觸電阻。量測結果顯示，NiSi/p+n接觸電阻率小於1 μΩ-cm2，符合未來對小面積歐姆接觸之要求。 對NiSi/n+p淺接面的研製，吾人使用的NiSi薄膜厚度為615 Å。以磷離子(P+)及氟離子(F+)作雙重佈植，再經過750oC退火90分鐘所得之NiSi/n+p淺接面，接面深度為71 nm，順向電流理想因素可達1.08，在5伏逆向偏壓下之接面漏電流密度可低於1 nA/cm2。植入氟離子可以提升NiSi的高溫穩定性，並且有效改善矽化鎳與矽基板間的界面平整度，進而改善接面特性。 對於TaN/NiSi/p+n 接面二極體而言，其特性並不因500oC的爐管退火30分鐘而有所改變。但是對於銅電極接觸的TaN/Cu/NiSi(310 Å)/p+n接面二極體，接面特性能夠忍受的退火溫度僅及350oC；退火溫度超過350oC，則接面特性開始呈現劣化。經由SIMS分析顯示，Cu在375oC時開始穿入NiSi，導致接面劣化，逆向偏壓漏電流增加。此外，在425oC的高溫退火可使Cu3Si矽化物相迅速增長，從而導致TaN層的破裂以及TaN/Cu/NiSi/Si 結構的解體。

This dissertation studies the basic material properties and process technologies of nickel silicide relevant to VLSI applications. First, the thermal stability of nickel monosilicide (NiSi) is investigated, including the effect of fluorine atoms incorporation in the NiSi film. Second, high performance NiSi/p+n and NiSi/n+p shallow junctions formed by ITS scheme followed by low temperature furnace annealing and RTA process are investigated. In addition, contact resistance of the NiSi/p+n junction is measured using a four-terminal Kelvin structure. Finally, we also investigate the thermal stability of the Cu-electrode contacted TaN/Cu/NiSi/p+n shallow junctions. Thin NiSi silicide films of 315- and 615-Å thicknesses on Si substrate were used to investigate the thermal stability of NiSi films. It was found that the thermal stability of the NiSi film is dependent on the implant species and the implantation condition. Both BF2+ and F+ implantations could improve the NiSi film’s thermal stability, while B+ and P+ implantations might result in degrading the thermal stability. In the system of NiSi/Si, the implanted fluorine atoms are presumably segregated to the NiSi grain boundaries and NiSi/Si interface, forming the strong Si–F and Ni–F bonds, and thus suppressing NiSi film agglomeration by decreasing the interfacial energy, i.e. stress between the NiSi layer and the Si substrate; as a result, the integrity of the silicide layer is preserved at high temperatures. The NiSi/p+n shallow junctions were fabricated using ITS scheme by BF2+ implantation into/through NiSi(310 Å)/Si samples followed by low temperature furnace annealing (FA) or RTA process. For the FA NiSi/p+n junction diodes fabricated in this work, the junction depth ranges from 23 to 70 nm measured from the NiSi/Si interface. The reverse bias current density of less than 2 nA/cm2 can be easily achieved; specifically, the NiSi(310 Å)/p+n junction fabricated with a 35keV BF2+ implantation to a dose of 5×1015 cm-2 followed by a 30-min-FA at 600oC, has a forward ideality factor of 1.01, a reverse bias current density (at –5 V) of less than 1 nA/cm2, and a junction depth of 56nm. For the RTA NiSi/p+n junction diodes fabricated in this work, the junction depth ranges from 23 to 56 nm measured from the NiSi/Si interface. The reverse bias current density of lower than 4nA/cm2 can be easily achieved; specifically, the NiSi(310 Å)/p+n junction fabricated with a 35keV BF2+ implantation to a dose of 5×1015 cm-2 followed by a 30-sec-RTA at 650oC, has a forward ideality factor of 1.001, a reverse bias current density (at –5 V) of 0.6 nA/cm2, and a junction depth of 37 nm. The contact resistance of the NiSi-contacted p+n junction fabricated using ITS scheme is measured by four terminal Kelvin test structure. The NiSi/p+n contact fabricated with BF2+ implantation at 35 keV to a dose of 5×1015 cm-2 through a 310Å-thick NiSi followed by 700 to 750oC RTA exhibited a contact resistivity (ρc) of about 0.05 μΩ-cm2. This low value contact resistivity is able to meet the requirement for future VLSI applications A P+/F+ dual implantation (P+ implant followed by F+ implant) is designed to promote the high temperature thermal stability of the NiSi film for the formation of NiSi/n+p shallow junctions. The NiSi(615Å)/n+p junction fabricated with P+/F+ dual implantation at 35/30 keV to a dose of 5×1015/5×1015 cm-2 followed by a 90min thermal annealing at 750oC, has a forward ideality factor of 1.08, a reverse bias current density (at 5 V) of 0.7 nA/cm2, and a junction depth of 71 nm. The additional F+ implantation was able to improve the NiSi/Si interface morphology at high temperatures, which is beneficial to the formation of high performance NiSi/n+p shallow junctions. The TaN/NiSi/p+n junction diode was found to be thermally stable up to at least 500oC (by a 30 min thermal annealing). However, the Cu contacted TaN/Cu/NiSi(310 Å)/p+n junction diode remained stable only up to a temperature of 350oC. SIMS analysis indicates that Cu started to penetrate into the NiSi-contacted shallow junction when the sample was annealed at 375oC, leading to a drastic increase in reverse bias leakage current. The rapid growth of Cu3Si silicide phase during the thermal annealing at 425oC resulted in the break of TaN cover layer, causing the eventual collapse of the TaN/Cu/NiSi/Si structure.