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dc.contributor.author黃俊巖en_US
dc.contributor.authorJun-Yen Huangen_US
dc.contributor.author吳慶源en_US
dc.contributor.authorChing-Yuan Wuen_US
dc.date.accessioned2014-12-12T02:12:11Z-
dc.date.available2014-12-12T02:12:11Z-
dc.date.issued1993en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT820430046en_US
dc.identifier.urihttp://hdl.handle.net/11536/58045-
dc.description.abstract首先對不同的電漿製程, 測量電晶體加入應力電流之後的特性衰退情形, 以萃取介面能態與氧化層陷井。再對各種不同的天線比例分析天線效應與 介面能態與氧化層陷井之間的關係。最後, 以一個等效電路模擬介面能態 與應力時間及天線比例之間的關係, 做為電路設計者的參考。 At first, for different plasma process, measure the degrad- ation of MOSFET which is applied stress current to extract interface states and oxide traps. Then the relation between antenna ratio and antenna effect, interface states, oxide traps is analized. Finally, a equivalent circuit is used to simulate the relation between interface states,stress time and antenna ratio. This could be used as reference for circuit designer.zh_TW
dc.language.isoen_USen_US
dc.subject電漿製程;金氧半場效電晶體.zh_TW
dc.subjectPlasma Process;MOSFETen_US
dc.title電漿製程對金氧半場效電晶體特性衰退的影響與模擬zh_TW
dc.titlePlasma Process-Induced Degradation in MOSFET and Its Modelingen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
Appears in Collections:Thesis