完整後設資料紀錄
DC 欄位語言
dc.contributor.author廖敏順en_US
dc.contributor.authorMin-Shung Liaoen_US
dc.contributor.author李崇仁en_US
dc.contributor.authorChung-Lin Leeen_US
dc.date.accessioned2014-12-12T02:12:12Z-
dc.date.available2014-12-12T02:12:12Z-
dc.date.issued1993en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT820430078en_US
dc.identifier.urihttp://hdl.handle.net/11536/58081-
dc.description.abstract本論文提出利用雙重閘極電晶體所構成新的能存四個值的多值靜態隨機存 取記憶體. 首先介紹雙重閘極電晶體的結構及描述它的臨界電壓受到面電 壓的改變情形. 我們提出一個等效電路來代替雙重閘極電晶體以做電腦分 析模擬. 接著介紹設計多值靜態記憶體的理論基礎. 我們提出三種新電路 分別由電阻負載, 空疺型負載, 以及互補型的單元基本電路所構成的多值 靜態隨機存取記憶體. 最後, 我們用實際實驗室五微米製成的實驗數據做 直流及暫態分析. In this work, we propose a new 4-valued SRAM cell by using the double-gate polysilion thin film transistor . First,the structure of the double-gate TFT is introducted and its threshold voltage controlled by the counter gate voltage is described.An equivalent circuit is proposed for the double-gate for SPICE simulation.The theory of the multi-valued memory for SRAM cell with the least transistors is introduced. Three circuits which are composed of the resistor load,the depletion load, and the CMOS basic block circuit are proposed. The DC and transient analysis results by using the 5um technology which is the practical experiment process are presented.zh_TW
dc.language.isoen_USen_US
dc.subject雙重閘極電晶體;多值靜態記憶體;臨界電壓zh_TW
dc.subjectdouble-gate TFT;multi-valued memory;threshold voltageen_US
dc.title多值記憶體zh_TW
dc.titleMulti-Valued Memoryen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
顯示於類別:畢業論文