標題: Gate-to-drain capacitance verifying the continuous-wave green laser crystallization n-TFT trapped charges distribution under dc voltage stress
作者: Hsieh, Zhen-Ying
Wang, Mu-Chun
Chen, Shuang-Yuan
Chen, Chih
Huang, Heng-Sheng
材料科學與工程學系
Department of Materials Science and Engineering
公開日期: 21-Dec-2009
摘要: In this work, a metrology was proposed to realize the distribution of fixed oxide trapped charges and grain boundary trapped states. The (continuous-wave green laser crystallization) n-channel thin-film transistors (TFTs) were forced by dc voltage stress, V(G)=V(D). The gate-to-drain capacitance, C(GD) -V(G), with varying frequency of applied small signal was developed. To probe the distribution of these defects, the difference (initial capacitance values minus stressed capacitance values) of C(GD) -V(G) with different frequencies was precisely studied. (C) 2009 American Institute of Physics. [doi:10.1063/1.3275728]
URI: http://dx.doi.org/10.1063/1.3275728
http://hdl.handle.net/11536/6306
ISSN: 0003-6951
DOI: 10.1063/1.3275728
期刊: APPLIED PHYSICS LETTERS
Volume: 95
Issue: 25
結束頁: 
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