Full metadata record
DC Field | Value | Language |
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dc.contributor.author | 林柏村 | en_US |
dc.contributor.author | B. C. Lin | en_US |
dc.contributor.author | 蔡中 | en_US |
dc.contributor.author | 荊鳳德 | en_US |
dc.contributor.author | 陳文照 | en_US |
dc.contributor.author | C. Tsai | en_US |
dc.contributor.author | Albert Chin | en_US |
dc.contributor.author | W. J. Chen | en_US |
dc.date.accessioned | 2014-12-12T02:20:52Z | - |
dc.date.available | 2014-12-12T02:20:52Z | - |
dc.date.issued | 1998 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#NT870428125 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/64417 | - |
dc.description.abstract | 摘要: 我們已經設計一緊密熱璧型低壓爐管系統,將之用於成長矽磊晶,選擇性矽磊晶以及極薄二氧化矽(< 30A)。在晶片表面殘存的自然生成氧化層不僅降低磊晶層的品質,其同樣對於極薄氧化層的品質有重大的影響.與超高真空化學氣相沉積或分子束磊晶相較,我們使用了設計良好的緊密型爐管以及高溫氫氣熱烤去降低爐管中水氣及氧氣的含量.我們使用此方法,首先在550oC成功的長出與矽基板相同品質矽磊晶.這低溫550oC的磊晶可以用來做矽-鍺磊晶.使用二氯甲矽皖(SiH2Cl2)去成長選擇性磊晶,我們可以在750oC成功的長出這個溫度可以用於積體電路的製程.自然生成氧化層將會影響閘極氧化層的品質.由於先去除自然生成氧化層然後再成長熱能氧化層,我們得到矽基板與氧化層之間的介面極為平整.使用此一氧化層與傳統爐管氧化層相較,有大量的改善載子移動率.在極平整氧化層下,其trap產生的速率以及SILC(stress induce leakage current)同樣大量的降低.我們使用氘去取代氫氣對閘極氧化層做退火,能夠得到更進一步改善這極薄氧化層的品質.由氘氣做退火可以降低五倍的SILC效應. | zh_TW |
dc.description.abstract | Abstract: We have designed a leak-tight low pressure hot wall furnace system, which can be used to grow Si epitaxy layer, selective epitaxial Si and ultra-thin silicon dioxide (<30A). The residual native oxide not only degrades the quality of epitaxial material but also extremely important for ultra-thin gate oxide. In contrast to previous ultra-high-vacuum chemical-vapor-deposition or molecular beam epitaxy, we have used a leak-tight design and hydrogen bake to reduce the background moisture and oxygen. We have first successfully grown epitaxial Si at 550oC and the quality of epitaxial film has been found comparable to that of Si substrate. The low temperature of 550 oC is especially chosen because it is suitable for future SiGe epitaxy. The selective epitaxy is achieved at low temperatures by using Dichlorosilane (SiH2Cl2) and a minimum temperature of 750 oC is achieved that is low enough for process integration consideration. The native oxide can strongly influence the gate oxide integrity. By removing the native oxide and re-growing thermal oxide, atomically smooth oxide-Si interface can be achieved. Significant mobility improvement was obtained from these oxides than that from conventional furnace oxidation. The trap generation rate and stress-induced leakage current (SILC) are also much reduced using the atomically smooth oxide. The gate oxide quality of ultra-thin oxide can be further improved by using deuterium annealing instead of traditional forming gas annealing. A factor of five times reduction of SILC is obtained by deuterium annealing. | en_US |
dc.language.iso | zh_TW | en_US |
dc.subject | 極平整 | zh_TW |
dc.subject | 超薄氧化層 | zh_TW |
dc.subject | 矽磊晶 | zh_TW |
dc.subject | 選擇性矽磊晶 | zh_TW |
dc.subject | 氘 | zh_TW |
dc.subject | atomically smooth | en_US |
dc.subject | ultra-thin oxide | en_US |
dc.subject | Si epitaxy | en_US |
dc.subject | selective Si epitaxy | en_US |
dc.subject | deuterium anneal | en_US |
dc.subject | SILC | en_US |
dc.title | 由矽磊晶到極平整之超薄氧化層製作 | zh_TW |
dc.title | From low temperature Si epitaxy to atomically smooth ultra-thin oxide | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 電子研究所 | zh_TW |
Appears in Collections: | Thesis |