A fully integrated spread spectrum clock generator using two-point delta-sigma modulation

doi:10.1109/ISCAS.2007.378600

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Hsieh, Yi-Bin	en_US
dc.contributor.author	Kao, Yao-Huang	en_US
dc.date.accessioned	2014-12-08T15:09:32Z	-
dc.date.available	2014-12-08T15:09:32Z	-
dc.date.issued	2007	en_US
dc.identifier.isbn	978-1-4244-0920-4	en_US
dc.identifier.issn	0271-4302	en_US
dc.identifier.uri	http://hdl.handle.net/11536/7279	-
dc.identifier.uri	http://dx.doi.org/10.1109/ISCAS.2007.378600	en_US
dc.description.abstract	A new spread spectrum clock generator (SSCG) using two-point delta-sigma modulation is presented in this paper. Not only the divider is varied, but also the voltage controlled oscillator is modulated. This technique can enhance the modulation bandwidth so that the effect of EMI suppression is improved. In addition, the method of two-path is applied to the loop filter to reduce the capacitance value such that the total integration can be achieved. The proposed SSG has been fabricated in a 0.35um CMOS process. The clock of 400MHz with center spread ratios of 1.25% and 2.5% are verified. The size of chip area is 0.90x0.89 mm(2).	en_US
dc.language.iso	en_US	en_US
dc.title	A fully integrated spread spectrum clock generator using two-point delta-sigma modulation	en_US
dc.type	Article	en_US
dc.identifier.doi	10.1109/ISCAS.2007.378600	en_US
dc.identifier.journal	2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11	en_US
dc.citation.spage	2156	en_US
dc.citation.epage	2159	en_US
dc.contributor.department	傳播研究所	zh_TW
dc.contributor.department	Institute of Communication Studies	en_US
dc.identifier.wosnumber	WOS:000251608402173	-
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