具減少偏移電壓的GPS混頻器之設計

Abstract

本論文設計一個使用在GPS接收端的混波器,其能對混波器的兩輸入端分別為RF端與LO端的電壓偏移加以補償。 補償功能主要是利用負回授回路來實現。 本GPS混頻器實現兩組負回授系統, 各組負回授迴路分別補償RF端和LO端的偏移電壓。 每組補償器是由一乘法器與增益級所組成; 其中乘法器是用來擷取偏移電壓的信號, 而增益級則是用來放大此信號。 我們使用HSPICE模擬所設計的GPS混頻器電路的性能。 其中模擬設定是在RF端輸入100mV，頻率為1.575GHz的正弦波信號, 而LO端則輸入100mV，頻率為1.571GHz的正弦波信號。由模擬結果, 我們發現若此混頻器未對電壓偏移加以補償時， 當輸入偏移電壓超過150mV時，則混頻器就無法正常工作。 但經加以補償後之混頻器, 其偏移電壓只要小於1.5V之內，則混頻器都能正常工作。 本電路採用(TSMC) 0.35um SiGe BiCMOS的製程技術來設計; 此電路共需要30顆NPN BJT電晶體及16個MOS晶體。 由模擬知此電路消耗功率為 2.54mW。

This thesis design a GPS mixer which can compensate for the voltage offset of two mixer inputs, namely the RF and the LO terminals. The compensation is realized via a negative feedback control loop. Two feedback loops are constructed to compensate, respectively, for the offset voltages of RF and LO terminals. Each compensator consists of a multiplier and an amplifier; the former is used to extract offset voltage signal while the latter is to increase the gain of the signal. The designed circuit is simulated using HSPICE. We set the RF input a sinusoidal signal at frequency 1.575GHz of the magnitude 100mV and the LO input also a sinusoids at frequency 1.571GHz of 100mV. The simulation results show that the mixer without using offset voltage compensator malfunctions when the offset voltage is larger than 150mV. When the compensator is applied, however, the mixer can function successfully if the offset voltage is no less than 1.5V. The mixer is designed using 0.35$\mu m$ SiGe BiCMOS technology provided by Taiwan Semi-Conductor Manufacturing Company. This circuit in total uses 30 NPN BJTs and 16 MOSFETs and it consumes 2.54mW.