完整後設資料紀錄
DC 欄位語言
dc.contributor.author萬諶en_US
dc.contributor.authorChen Wanen_US
dc.contributor.author吳重雨en_US
dc.contributor.author林伯剛en_US
dc.contributor.authorChung-Yu Wuen_US
dc.contributor.authorPo-Kang Linen_US
dc.date.accessioned2014-12-12T03:03:11Z-
dc.date.available2014-12-12T03:03:11Z-
dc.date.issued2007en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT009411711en_US
dc.identifier.urihttp://hdl.handle.net/11536/80622-
dc.description.abstract本篇論文中描述一個應用於下視網膜療程中的人工矽視網膜晶片設計。包含光電池架構的設計、晶片時脈產生器的設計、基本像素的設計與電能控制系統的設計。在光電池供電系統中,我們提出新的光電池架構並將電路系統與光電池同時整合在CMOS積體電路晶片上的設計也經由許多相關的測試元件與設計改良驗證其使用特性。我們並且初步設計並實作由感光二極體陣列構成之視網膜晶片的體外生物實驗,成功的驗證視網膜晶片刺激視網膜細胞的生物反應。而晶片時脈系統經過設計、模擬、量測後驗證為一超低功率時脈產生器,此振盪器可在3.6mW/cm2的光照強度下產生1.632KHz的震盪其電路消耗功率僅為5.2nW。此植入式人工視網膜晶片使用了由生物特性啟發而得的電能控制系統,所以在下視網膜療程中的電能使用效益上有所改善。在應用此分區供電的架構下,此晶片可以產生約三倍的有效輸出電流已提供視網膜細胞所需要的電性刺激。此晶片在3.6mW/cm2的光照強度下可以得到約略844nA的電流輸出、在5.06mW/cm2的光照強度下可以得到約略1.72μA的電流輸出。在台灣積體電路製造股份有限公司與國家晶片系統中心的幫助下,此視網膜晶片將以0.18微米製程實現。基於上述特性,此光電池架構、視網膜晶片與電源控制系統對下視網膜療程中的人工矽視網膜晶片設計上有相當程度的貢獻。zh_TW
dc.description.abstractIn this thesis, a retinal chip has been designed, analyzed, and fabricated to improve the power efficiency of the sub-retinal prostheses. The preliminary in vitro experiment of the silicon retina chip which composed of micro photodiode array has also been designed and verified. The silicon retina with MPA can successfully trigger the retina cell and the electrical-response is similar to the light-response in retina cell. The feasibility of on-chip solar cell supply system which integrated with circuit system in CMOS technology has been verified in the work. An ultra-low power clock generator is also designed and verified in this work. This clock generator can generate a clock signal with 1.632KHz under 3.6mW/cm2 incident light intensity with only 5.2nW power consumption. A three times output stimulating current is achieved by taking advantage of the bio-inspired divisional power supply architecture. The stimulating output current is approximately 844nA under the illumination of 3.6mW/cm2 light intensity and 1.72μA under the illumination of 5.06mW/cm2 light intensity. The retinal chip fabricated with a standard 0.18μm tsmc CMOS process demonstrate good mimic of electrical behavior of human retina with low-power consumption. Because of its characteristic, the proposed power management system could be considered as one of the highly integrated solutions for the sub-retinal implant chips.en_US
dc.language.isoen_USen_US
dc.subject人工視網膜zh_TW
dc.subject低功率振盪器zh_TW
dc.subject太陽能電池zh_TW
dc.subject電能控制系統zh_TW
dc.subjectartificial retinaen_US
dc.subjectlow-power oscillatoren_US
dc.subjectsolar cellen_US
dc.subjectpower control systemen_US
dc.title應用於視網膜療程之植入式人工視網膜與其電源控制電路zh_TW
dc.titleA CMOS IMPLANTABLE RETINAL CHIP WITH SOLAR CELL POWER SUPPLY CONTROL CIRCUIT FOR RETINA PROSTHESESen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
顯示於類別:畢業論文


文件中的檔案:

  1. 171101.pdf

若為 zip 檔案,請下載檔案解壓縮後,用瀏覽器開啟資料夾中的 index.html 瀏覽全文。