超大型積體電路功率估測及功率分佈繪圖之研究

Abstract

隨著半導體製程的進步, 半導體線路中的金屬導線越來越細, 導線與導線之間的距離也越來越近, 這樣的現象使得散熱問題不得不為線路設計者所重視。更有甚者, 積體電路的工作頻率也不斷的向上飈高, 同樣也使得線路中因功率消耗所轉換的熱能難以宣洩。線路温度的提高最直接的結果就是晶片冒煙燒毀。但是在燒毀之前它也可能因為導線在高溫下長期使用而斷裂, 或者是電阻值在高溫下而大到電路功能失常。這些現象都顯示了線路設計者在生產前做好功率估測的重要性。 然而功率估測的方式有很多種, 比如, 估計電池耐久時間時要計算能量消耗, 分析溫度變化要測量功率消耗, 評估導線寬度要測量平均電流, 而導線可靠度分析則需要電流密度的平均值及方均根值等等。雖然這些測量值都有明確的定義及適用場合, 但是卻都會遇到一個相同的問題就是: 功率估測值是和輸入訊號有關的, 但是線路設計者卻通常無法想像出一個具有代表性的輸入訊號來進行功率估測。 針對這個問題, 本篇論文提出了一個結合了最準確的線路模擬-SPICE的全自動解決方法。首先本論文先分析了輸入訊號的統計值的特性以及這些特性和功率消耗之間的關係。我們證實了每個不同的輸入訊號應該用不同的功率靈敏度。而且我們發現這種功率靈敏度應該根據不同的輸入訊號統計值組合來測量才會有較好的精準度。經由這樣的發現, 運用在已知輸入訊號序列的情況下, 我們可以利用功率靈敏度來當做功率消耗的指標, 進而對輸入訊號序列進行分組的動作。因為在已分組的輸入訊號序列做取樣模擬, 不但可以大幅縮短模擬全部輸入訊號序列可能需要的冗長時間, 還可以避免因為取樣時的樣本失真而造成的誤差。除了已知輸入訊號序列的功率估測外, 本論文還將它延伸到未知輸入訊號序列的功率估測。由於未知輸入訊號序列的功率分佈範圍廣泛, 將功率分佈的情況以長條統計圖的方式顯示出來是最不失真的方式。但是因為未知輸入訊號序列的輸入組合幾乎有無限多種, 所以如何有效的對輸入訊號組合分類及取樣就更形重要。 本論文所提出的自動化功率分佈圖化器可以針對無限或有限長的輸入訊號來進行輸入訊號組合的分類及取樣。並且和線路模擬器SPICE完整結合, 只要給定一個電路及其輸入端的定義, 本論文提出的圖化器就可以利用線路模擬器的部份模擬結果進行全自動的功率靈敏度分析來做為輸入訊號組合的分類及取樣的參考, 以期能以最短的時間模擬最少的輸入訊號組合, 求得該線路的功率消耗分佈並以數據及圖像方式表現。

As the semiconductor technology getting advances, the density of the devices and the metal lines are growing too large to keep the heat conduction problem unnoticed. Furthermore, the heat generated by the circuits is boosted with the ramping of the operating speed. Improperly heat conduction can lead to the smoking of the chip, torturing or breaking of the metal lines, or shifting of the performance. All these problems can be prevented by the power consumption estimation and optimization before taping out the chip. There are many ways of estimating power corresponding to different purposes. For example, we need to estimate energy consumption for battery endurance, we need the power consumption for temperature analysis, and we need the average current for wire width design, and the current density for reliability analysis. Although these measurements are all clearly defined, but they have a common problem that they are input signal dependent. To do the power analysis without lost of generality, we propose an automatic power profiler which is integrated into the most accurate circuit simulator - SPICE. With the power profiler, users can get a visual figure of the power consumption distribution instead of numbers with uncertainties. In this dissertation, we first analyze the relation between input statistics and the power consumption of the integrated circuits. The power sensitivities of inputs are proven to be effective provided the nominal points are selected properly. With this acknowledge, the power sensitivity sum of each input can be used to indicate the power consumption tendency of the input vectors, and to stratify the input vectors with. After the stratification, the sample variance can be reduced when simulating the input vectors selective. In addition, we found that stratification with power sensitivity can prevent the pre-matured estimation when estimating the average power consumption with Monte Carlo method. We also proposed a new way of stratification that is suitable for stratifying infinite length input sequences based on POST and POSTIV. By putting these findings together, we have modified the SPICE circuit simulator to be a tool that can visualize the distribution of the power consumption according to the user specified input statistics or input sequences.