系統晶片設計平面規劃之研究

標題:	系統晶片設計平面規劃之研究 Floorplans for Systems-on-a-Chip Design
作者:	張耀文 YAO-WENCHANG 國立交通大學資訊科學學系
公開日期:	2000
官方說明文件#:	NSC89-2215-E009-117
URI:	http://hdl.handle.net/11536/89288 https://www.grb.gov.tw/search/planDetail?id=583930&docId=109717
Appears in Collections:	Research Plans

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