標題: 全數位鎖相迴路設計與應用之研究
The Study of all Digital Phase Lock Loop Design and Its Applications
作者: 李鎮宜
LEE CHEN-YI
交通大學電子工程系
關鍵字: 全數位鎖相迴路;數位振盪器;頻率搜尋;脈波產生器;無線網路;乙太網路;All digital PLL (ADPLL);Digital controlled ring oscillator;Frequency-search module;Clock generator;Wireless LAN (WLAN);Ethernet;HDL generator
公開日期: 2000
官方說明文件#: NSC89-2215-E009-053
URI: http://hdl.handle.net/11536/89410
https://www.grb.gov.tw/search/planDetail?id=542377&docId=99656
Appears in Collections:Research Plans